[coreboot-gerrit] Patch merged into coreboot/master: 8adf7a2 Log device path into CMOS during probe stages
gerrit at coreboot.org
gerrit at coreboot.org
Tue Nov 26 19:10:34 CET 2013
the following patch was just integrated into master:
commit 8adf7a2c50dcb3a7f09b66c1f3918ab195d8c5ec
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Mon Jun 10 10:34:20 2013 -0700
Log device path into CMOS during probe stages
One of the most common hangs during coreboot execution
is during ramstage device init steps. Currently there
are a set of (somewhat misleading) post codes during this
phase which give some indication as to where execution
stopped, but it provides no information on what device
was actually being initialized at that point.
This uses the new CMOS "extra" log banks to store the
encoded device path of the device that is about to be
touched by coreboot. This way if the system hangs when
talking to the device there will be some indication where
to investigate next.
interrupted boot with reset button and
gathered the eventlog after several test runs:
26 | 2013-06-10 10:32:48 | System boot | 120
27 | 2013-06-10 10:32:48 | Last post code in previous boot | 0x75 | Device Initialize
28 | 2013-06-10 10:32:48 | Extra info from previous boot | PCI | 00:16.0
29 | 2013-06-10 10:32:48 | Reset Button
30 | 2013-06-10 10:32:48 | System Reset
Change-Id: I6045bd4c384358b8a4e464eb03ccad639283939c
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://gerrit.chromium.org/gerrit/58105
Reviewed-on: http://review.coreboot.org/4230
Tested-by: build bot (Jenkins)
Reviewed-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
See http://review.coreboot.org/4230 for details.
-gerrit
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