[coreboot-gerrit] Patch set updated for coreboot: 595f87e slippy/falco/peppy: Fix SPD GPIO initialization.

[Stefan Reinauer (stefan.reinauer@coreboot.org)]

Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4237

-gerrit

commit 595f87e0ecef610601b28aaf7ccf9c73fde76aae
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Thu Jun 13 17:29:36 2013 -0700

    slippy/falco/peppy: Fix SPD GPIO initialization.
    
    SPD GPIOs were being read prior to initialization in romstage_common. To
    fix, pass the copy_spd function to romstage_common, to be called at the
    appropriate time (after PCH init, before DRAM init).
    
    Change-Id: I2554813e56a58c8c81456f1a53cc8ce9c2030a73
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Signed-off-by: Shawn Nematbakhsh <shawnn at chromium.org>
    Reviewed-on: https://gerrit.chromium.org/gerrit/58608
---
 src/cpu/intel/haswell/haswell.h             | 1 +
 src/cpu/intel/haswell/romstage.c            | 3 +++
 src/mainboard/google/falco/romstage.c       | 4 +---
 src/mainboard/google/peppy/romstage.c       | 4 +---
 src/mainboard/google/slippy/romstage.c      | 4 +---
 src/mainboard/intel/baskingridge/romstage.c | 2 ++
 src/mainboard/intel/wtm2/romstage.c         | 2 ++
 7 files changed, 11 insertions(+), 9 deletions(-)

diff --git a/src/cpu/intel/haswell/haswell.h b/src/cpu/intel/haswell/haswell.h
index 7dfba86..cd007c1 100644
--- a/src/cpu/intel/haswell/haswell.h
+++ b/src/cpu/intel/haswell/haswell.h
@@ -151,6 +151,7 @@ struct romstage_params {
 	const void *gpio_map;
 	const struct rcba_config_instruction *rcba_config;
 	unsigned long bist;
+	void (*copy_spd)(struct pei_data *);
 };
 void mainboard_romstage_entry(unsigned long bist);
 void romstage_common(const struct romstage_params *params);
diff --git a/src/cpu/intel/haswell/romstage.c b/src/cpu/intel/haswell/romstage.c
index 757cc34..35b51c5 100644
--- a/src/cpu/intel/haswell/romstage.c
+++ b/src/cpu/intel/haswell/romstage.c
@@ -246,6 +246,9 @@ void romstage_common(const struct romstage_params *params)
 
 	report_platform_info();
 
+	if (params->copy_spd != NULL)
+		params->copy_spd(params->pei_data);
+
 	sdram_initialize(params->pei_data);
 
 	timestamp_add_now(TS_AFTER_INITRAM);
diff --git a/src/mainboard/google/falco/romstage.c b/src/mainboard/google/falco/romstage.c
index ef6a849..74ace9b 100644
--- a/src/mainboard/google/falco/romstage.c
+++ b/src/mainboard/google/falco/romstage.c
@@ -155,11 +155,9 @@ void mainboard_romstage_entry(unsigned long bist)
 		.gpio_map = &mainboard_gpio_map,
 		.rcba_config = &rcba_config[0],
 		.bist = bist,
+		.copy_spd = copy_spd,
 	};
 
-	/* Prepare SPD data */
-	copy_spd(&pei_data);
-
 	/* Call into the real romstage main with this board's attributes. */
 	romstage_common(&romstage_params);
 }
diff --git a/src/mainboard/google/peppy/romstage.c b/src/mainboard/google/peppy/romstage.c
index 8679adb..d979203 100644
--- a/src/mainboard/google/peppy/romstage.c
+++ b/src/mainboard/google/peppy/romstage.c
@@ -183,11 +183,9 @@ void mainboard_romstage_entry(unsigned long bist)
 		.gpio_map = &mainboard_gpio_map,
 		.rcba_config = &rcba_config[0],
 		.bist = bist,
+		.copy_spd = copy_spd,
 	};
 
-	/* Prepare SPD data */
-	copy_spd(&pei_data);
-
 	/* Call into the real romstage main with this board's attributes. */
 	romstage_common(&romstage_params);
 
diff --git a/src/mainboard/google/slippy/romstage.c b/src/mainboard/google/slippy/romstage.c
index 8679adb..d979203 100644
--- a/src/mainboard/google/slippy/romstage.c
+++ b/src/mainboard/google/slippy/romstage.c
@@ -183,11 +183,9 @@ void mainboard_romstage_entry(unsigned long bist)
 		.gpio_map = &mainboard_gpio_map,
 		.rcba_config = &rcba_config[0],
 		.bist = bist,
+		.copy_spd = copy_spd,
 	};
 
-	/* Prepare SPD data */
-	copy_spd(&pei_data);
-
 	/* Call into the real romstage main with this board's attributes. */
 	romstage_common(&romstage_params);
 
diff --git a/src/mainboard/intel/baskingridge/romstage.c b/src/mainboard/intel/baskingridge/romstage.c
index 8b18e6d..1dc4960 100644
--- a/src/mainboard/intel/baskingridge/romstage.c
+++ b/src/mainboard/intel/baskingridge/romstage.c
@@ -19,6 +19,7 @@
  */
 
 #include <stdint.h>
+#include <stddef.h>
 #include <console/console.h>
 #include "cpu/intel/haswell/haswell.h"
 #include "northbridge/intel/haswell/haswell.h"
@@ -126,6 +127,7 @@ void mainboard_romstage_entry(unsigned long bist)
 		.gpio_map = &mainboard_gpio_map,
 		.rcba_config = &rcba_config[0],
 		.bist = bist,
+		.copy_spd = NULL,
 	};
 
 	/* Call into the real romstage main with this board's attributes. */
diff --git a/src/mainboard/intel/wtm2/romstage.c b/src/mainboard/intel/wtm2/romstage.c
index f38389c..0a24e48 100644
--- a/src/mainboard/intel/wtm2/romstage.c
+++ b/src/mainboard/intel/wtm2/romstage.c
@@ -19,6 +19,7 @@
  */
 
 #include <stdint.h>
+#include <stddef.h>
 #include <console/console.h>
 #include "cpu/intel/haswell/haswell.h"
 #include "northbridge/intel/haswell/haswell.h"
@@ -123,6 +124,7 @@ void mainboard_romstage_entry(unsigned long bist)
 		.gpio_map = &mainboard_gpio_map,
 		.rcba_config = &rcba_config[0],
 		.bist = bist,
+		.copy_spd = NULL,
 	};
 
 	/* Call into the real romstage main with this board's attributes. */