[coreboot-gerrit] New patch to review for coreboot: da4cebc AMD: Remove references to global high_tables_base

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Tue Sep 3 13:47:42 CEST 2013


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/3894

-gerrit

commit da4cebc5d3a5ce207773ad245b8430986d6d99ae
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Thu Jun 27 08:20:09 2013 +0300

    AMD: Remove references to global high_tables_base
    
    Prepare for removal of globals high_tables_base and _size
    by replacing the references with a helper function.
    
    Change-Id: I5b5f71630f03b6a01e9c8ff96cb78e9da03e5cc3
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/boot/Makefile.inc                     |  1 +
 src/arch/x86/boot/ramtop.c                         | 31 ++++++++++++++++++++++
 src/include/cbmem.h                                |  1 +
 src/northbridge/amd/agesa/family10/northbridge.c   | 18 +++----------
 src/northbridge/amd/agesa/family12/northbridge.c   | 23 +++-------------
 src/northbridge/amd/agesa/family14/northbridge.c   | 22 +++------------
 src/northbridge/amd/agesa/family15/northbridge.c   | 18 +++----------
 src/northbridge/amd/agesa/family15tn/northbridge.c | 18 +++----------
 src/northbridge/amd/agesa/family16kb/northbridge.c | 18 +++----------
 src/northbridge/amd/amdfam10/northbridge.c         | 18 +++----------
 src/northbridge/amd/amdk8/northbridge.c            | 18 +++----------
 11 files changed, 65 insertions(+), 121 deletions(-)

diff --git a/src/arch/x86/boot/Makefile.inc b/src/arch/x86/boot/Makefile.inc
index 7b67e49..6778ad8 100644
--- a/src/arch/x86/boot/Makefile.inc
+++ b/src/arch/x86/boot/Makefile.inc
@@ -2,6 +2,7 @@ ramstage-y += boot.c
 ramstage-$(CONFIG_MULTIBOOT) += multiboot.c
 ramstage-y += gdt.c
 ramstage-y += tables.c
+ramstage-y += ramtop.c
 ramstage-$(CONFIG_GENERATE_MP_TABLE) += mpspec.c
 ramstage-$(CONFIG_GENERATE_PIRQ_TABLE) += pirq_routing.c
 ramstage-$(CONFIG_GENERATE_ACPI_TABLES) += acpi.c
diff --git a/src/arch/x86/boot/ramtop.c b/src/arch/x86/boot/ramtop.c
new file mode 100644
index 0000000..d433709
--- /dev/null
+++ b/src/arch/x86/boot/ramtop.c
@@ -0,0 +1,31 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA, 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <cbmem.h>
+
+#if !CONFIG_DYNAMIC_CBMEM
+void set_top_of_ram_once(uint64_t ramtop)
+{
+	if (high_tables_base == 0) {
+		high_tables_base = ramtop - HIGH_MEMORY_SIZE;
+		high_tables_size = HIGH_MEMORY_SIZE;
+	}
+	printk(BIOS_DEBUG, "high_tables_base: %08llx, size %lld\n",
+		high_tables_base, high_tables_size);
+}
+#endif
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index 982a6d8..5e438f3 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -135,6 +135,7 @@ void cbmem_add_lb_mem(struct lb_memory *mem);
 
 #ifndef __PRE_RAM__
 extern uint64_t high_tables_base, high_tables_size;
+void set_top_of_ram_once(uint64_t ramtop);
 void set_cbmem_toc(struct cbmem_entry *);
 #endif
 
diff --git a/src/northbridge/amd/agesa/family10/northbridge.c b/src/northbridge/amd/agesa/family10/northbridge.c
index ceb1d50..602d473 100644
--- a/src/northbridge/amd/agesa/family10/northbridge.c
+++ b/src/northbridge/amd/agesa/family10/northbridge.c
@@ -1036,17 +1036,11 @@ static void amdfam10_domain_set_resources(device_t dev)
 					ram_resource(dev, (idx | i), basek, pre_sizek);
 					idx += 0x10;
 					sizek -= pre_sizek;
-					if (high_tables_base==0) {
-					/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-						high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(uma_memory_base);
 #else
-						high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(mmio_basek * 1024);
 #endif
-						high_tables_size = HIGH_MEMORY_SIZE;
-						printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-							     (u32)(high_tables_size / 1024), high_tables_base);
-					}
 				}
 				basek = mmio_basek;
 			}
@@ -1063,15 +1057,11 @@ static void amdfam10_domain_set_resources(device_t dev)
 		idx += 0x10;
 		printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
 			     i, mmio_basek, basek, limitk);
-		if (high_tables_base==0) {
-		/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-			high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(uma_memory_base);
 #else
-			high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(limitk * 1024);
 #endif
-			high_tables_size = HIGH_MEMORY_SIZE;
-		}
 	}
 
 #if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/agesa/family12/northbridge.c b/src/northbridge/amd/agesa/family12/northbridge.c
index 621246f..4c230f1 100644
--- a/src/northbridge/amd/agesa/family12/northbridge.c
+++ b/src/northbridge/amd/agesa/family12/northbridge.c
@@ -722,20 +722,12 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
                     ram_resource(dev, idx, basek, pre_sizek);
                     idx += 0x10;
                     sizek -= pre_sizek;
-                    if (high_tables_base==0) {
-                    /* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-                        high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+                    set_top_of_ram_once(uma_memory_base);
 #else
-                        high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+                    set_top_of_ram_once(mmio_basek * 1024);
 #endif
-                        high_tables_size = HIGH_MEMORY_SIZE;
-                        printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-				 (u32)(high_tables_size / 1024),
-                                 high_tables_base);
-                    }
                 }
-
                 basek = mmio_basek;
             }
             if ((basek + sizek) <= 4*1024*1024) {
@@ -751,20 +743,13 @@ printk(BIOS_DEBUG, "adsr - 0xa0000 to 0xbffff resource.\n");
         idx += 0x10;
         printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
                  0, mmio_basek, basek, limitk);
-        if (high_tables_base==0) {
-        /* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-            high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
-            printk(BIOS_DEBUG, "  adsr - uma_memory_base = %llx.\n", uma_memory_base);
+        set_top_of_ram_once(uma_memory_base);
 #else
-            high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+        set_top_of_ram_once(limitk * 1024);
 #endif
-            high_tables_size = HIGH_MEMORY_SIZE;
-        }
     }
 	printk(BIOS_DEBUG, "  adsr - mmio_basek = %lx.\n", mmio_basek);
-	printk(BIOS_DEBUG, "  adsr - high_tables_size = %llx.\n",
-		high_tables_size);
 
 #if CONFIG_GFXUMA
 	uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
diff --git a/src/northbridge/amd/agesa/family14/northbridge.c b/src/northbridge/amd/agesa/family14/northbridge.c
index e7de273..fbf8e44 100644
--- a/src/northbridge/amd/agesa/family14/northbridge.c
+++ b/src/northbridge/amd/agesa/family14/northbridge.c
@@ -716,19 +716,12 @@ static void domain_set_resources(device_t dev)
 						     pre_sizek);
 					idx += 0x10;
 					sizek -= pre_sizek;
-					if (high_tables_base == 0) {
-						/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-						high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(uma_memory_base);
 #else
-						high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(mmio_basek * 1024);
 #endif
-						high_tables_size = HIGH_MEMORY_SIZE;
-						printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-							 (u32)(high_tables_size / 1024), high_tables_base);
-					}
 				}
-
 				basek = mmio_basek;
 			}
 			if ((basek + sizek) <= 4 * 1024 * 1024) {
@@ -744,20 +737,13 @@ static void domain_set_resources(device_t dev)
 		printk(BIOS_DEBUG,
 			"%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n", 0,
 			 mmio_basek, basek, limitk);
-		if (high_tables_base == 0) {
-			/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-			high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
-			printk(BIOS_DEBUG, "  adsr - uma_memory_base = %llx.\n", uma_memory_base);
+		set_top_of_ram_once(uma_memory_base);
 #else
-			high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(limitk * 1024);
 #endif
-			high_tables_size = HIGH_MEMORY_SIZE;
-		}
 	}
 	printk(BIOS_DEBUG, "  adsr - mmio_basek = %lx.\n", mmio_basek);
-	printk(BIOS_DEBUG, "  adsr - high_tables_size = %llx.\n",
-		high_tables_size);
 
 #if CONFIG_GFXUMA
 	uma_resource(dev, 7, uma_memory_base >> 10, uma_memory_size >> 10);
diff --git a/src/northbridge/amd/agesa/family15/northbridge.c b/src/northbridge/amd/agesa/family15/northbridge.c
index 78e9966..bdd6939 100644
--- a/src/northbridge/amd/agesa/family15/northbridge.c
+++ b/src/northbridge/amd/agesa/family15/northbridge.c
@@ -807,17 +807,11 @@ static void domain_set_resources(device_t dev)
 					ram_resource(dev, (idx | i), basek, pre_sizek);
 					idx += 0x10;
 					sizek -= pre_sizek;
-					if (high_tables_base==0) {
-						/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-						high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(uma_memory_base);
 #else
-						high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(mmio_basek * 1024);
 #endif
-						high_tables_size = HIGH_MEMORY_SIZE;
-						printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-							 (u32)(high_tables_size / 1024), high_tables_base);
-					}
 				}
 				basek = mmio_basek;
 			}
@@ -834,15 +828,11 @@ static void domain_set_resources(device_t dev)
 		idx += 0x10;
 		printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
 				i, mmio_basek, basek, limitk);
-		if (high_tables_base==0) {
-			/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-			high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(uma_memory_base);
 #else
-			high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(limitk * 1024);
 #endif
-			high_tables_size = HIGH_MEMORY_SIZE;
-		}
 	}
 
 #if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/agesa/family15tn/northbridge.c b/src/northbridge/amd/agesa/family15tn/northbridge.c
index 0a69ad8..736e634 100644
--- a/src/northbridge/amd/agesa/family15tn/northbridge.c
+++ b/src/northbridge/amd/agesa/family15tn/northbridge.c
@@ -793,17 +793,11 @@ static void domain_set_resources(device_t dev)
 					ram_resource(dev, (idx | i), basek, pre_sizek);
 					idx += 0x10;
 					sizek -= pre_sizek;
-					if (high_tables_base==0) {
-						/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-						high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(uma_memory_base);
 #else
-						high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(mmio_basek * 1024);
 #endif
-						high_tables_size = HIGH_MEMORY_SIZE;
-						printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-							 (u32)(high_tables_size / 1024), high_tables_base);
-					}
 				}
 				basek = mmio_basek;
 			}
@@ -821,15 +815,11 @@ static void domain_set_resources(device_t dev)
 		idx += 0x10;
 		printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
 				i, mmio_basek, basek, limitk);
-		if (high_tables_base==0) {
-			/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-			high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(uma_memory_base);
 #else
-			high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(limitk * 1024);
 #endif
-			high_tables_size = HIGH_MEMORY_SIZE;
-		}
 	}
 
 #if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/agesa/family16kb/northbridge.c b/src/northbridge/amd/agesa/family16kb/northbridge.c
index c27a1b2..266319c 100644
--- a/src/northbridge/amd/agesa/family16kb/northbridge.c
+++ b/src/northbridge/amd/agesa/family16kb/northbridge.c
@@ -799,17 +799,11 @@ static void domain_set_resources(device_t dev)
 					ram_resource(dev, (idx | i), basek, pre_sizek);
 					idx += 0x10;
 					sizek -= pre_sizek;
-					if (high_tables_base==0) {
-						/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-						high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(uma_memory_base);
 #else
-						high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(mmio_basek * 1024);
 #endif
-						high_tables_size = HIGH_MEMORY_SIZE;
-						printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-							 (u32)(high_tables_size / 1024), high_tables_base);
-					}
 				}
 				basek = mmio_basek;
 			}
@@ -827,15 +821,11 @@ static void domain_set_resources(device_t dev)
 		idx += 0x10;
 		printk(BIOS_DEBUG, "node %d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
 				i, mmio_basek, basek, limitk);
-		if (high_tables_base==0) {
-			/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-			high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(uma_memory_base);
 #else
-			high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(limitk * 1024);
 #endif
-			high_tables_size = HIGH_MEMORY_SIZE;
-		}
 	}
 
 #if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/amdfam10/northbridge.c b/src/northbridge/amd/amdfam10/northbridge.c
index 3f7ca25..8dbb480 100644
--- a/src/northbridge/amd/amdfam10/northbridge.c
+++ b/src/northbridge/amd/amdfam10/northbridge.c
@@ -1038,17 +1038,11 @@ static void amdfam10_domain_set_resources(device_t dev)
 					idx += 0x10;
 					sizek -= pre_sizek;
 
-					if (high_tables_base==0) {
-					/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-						high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(uma_memory_base);
 #else
-						high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(mmio_basek * 1024);
 #endif
-						high_tables_size = HIGH_MEMORY_SIZE;
-						printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-							HIGH_MEMORY_SIZE / 1024, high_tables_base);
-					}
 				}
 				#if !CONFIG_AMDMCT
 				#if CONFIG_HW_MEM_HOLE_SIZEK != 0
@@ -1076,15 +1070,11 @@ static void amdfam10_domain_set_resources(device_t dev)
 		idx += 0x10;
 		printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08llx, limitk=%08llx\n",
 			     i, mmio_basek, basek, limitk);
-		if (high_tables_base==0) {
-		/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-			high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(uma_memory_base);
 #else
-			high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(limitk * 1024);
 #endif
-			high_tables_size = HIGH_MEMORY_SIZE;
-		}
 	}
 
 #if CONFIG_GFXUMA
diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c
index 9610587..c7321a4 100644
--- a/src/northbridge/amd/amdk8/northbridge.c
+++ b/src/northbridge/amd/amdk8/northbridge.c
@@ -1042,17 +1042,11 @@ static void amdk8_domain_set_resources(device_t dev)
 					ram_resource(dev, (idx | i), basek, pre_sizek);
 					idx += 0x10;
 					sizek -= pre_sizek;
-					if (high_tables_base==0) {
-					/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-						high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(uma_memory_base);
 #else
-						high_tables_base = (mmio_basek * 1024) - HIGH_MEMORY_SIZE;
+					set_top_of_ram_once(mmio_basek * 1024);
 #endif
-						high_tables_size = HIGH_MEMORY_SIZE;
-						printk(BIOS_DEBUG, " split: %dK table at =%08llx\n",
-							HIGH_MEMORY_SIZE / 1024, high_tables_base);
-					}
 				}
 				#if CONFIG_HW_MEM_HOLE_SIZEK != 0
 				if(reset_memhole)
@@ -1077,15 +1071,11 @@ static void amdk8_domain_set_resources(device_t dev)
 		idx += 0x10;
 		printk(BIOS_DEBUG, "%d: mmio_basek=%08lx, basek=%08x, limitk=%08x\n",
 			     i, mmio_basek, basek, limitk);
-		if (high_tables_base==0) {
-		/* Leave some space for ACPI, PIRQ and MP tables */
 #if CONFIG_GFXUMA
-			high_tables_base = uma_memory_base - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(uma_memory_base);
 #else
-			high_tables_base = (limitk * 1024) - HIGH_MEMORY_SIZE;
+		set_top_of_ram_once(limitk * 1024);
 #endif
-			high_tables_size = HIGH_MEMORY_SIZE;
-		}
 	}
 
 #if CONFIG_GFXUMA



More information about the coreboot-gerrit mailing list