[coreboot-gerrit] New patch to review for coreboot: 9c8bd6a Exynos5: Remove unneeded USB delays

[Isaac Christensen (isaac.christensen@se-eng.com)]

Isaac Christensen (isaac.christensen at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6503

-gerrit

commit 9c8bd6a53aef2ce3bafa19098cea3c5ae6820d2f
Author: Stefan Reinauer <reinauer at chromium.org>
Date:   Wed Aug 14 17:14:39 2013 -0700

    Exynos5: Remove unneeded USB delays
    
    Old-Change-Id: I1144e9d6d6c4278842fdd36743c8a88555f81707
    Signed-off-by: Stefan Reinauer <reinauer at google.com>
    Reviewed-on: https://gerrit.chromium.org/gerrit/65912
    Reviewed-by: Ronald G. Minnich <rminnich at chromium.org>
    Commit-Queue: Stefan Reinauer <reinauer at chromium.org>
    Tested-by: Stefan Reinauer <reinauer at chromium.org>
    (cherry picked from commit 95b518877edc88347ce9725ffee32f3aed0de7dc)
    
    Exynos5420: tighten up display port delays
    
    Shorten a few delays, and make some delays shorter but let the
    loops have a higher termination count (i.e. give it the same
    amount of time to warm up, but check more frequently).
    
    Old-Change-Id: Id9fe846ae3a8d792b14d62aea4e98d8aad05be43
    Signed-off-by: Ronald G. Minnich <rminnich at gmail.com>
    Reviewed-on: https://gerrit.chromium.org/gerrit/66156
    Commit-Queue: Ronald G. Minnich <rminnich at chromium.org>
    Tested-by: Ronald G. Minnich <rminnich at chromium.org>
    Reviewed-by: Stefan Reinauer <reinauer at google.com>
    (cherry picked from commit a112e77f2f21f41f982ca22bebdac213cc8d233a)
    
    Squashed two small commits for Exynos.
    
    Change-Id: Iee753eaddb759d2e7df98e73cb793ec4053773dd
    Signed-off-by: Isaac Christensen <isaac.christensen at se-eng.com>
---
 src/cpu/samsung/exynos5250/usb.c         | 9 +++++----
 src/cpu/samsung/exynos5420/dp.h          | 2 +-
 src/cpu/samsung/exynos5420/dp_lowlevel.c | 4 ++--
 src/cpu/samsung/exynos5420/usb.c         | 9 +++++----
 4 files changed, 13 insertions(+), 11 deletions(-)

diff --git a/src/cpu/samsung/exynos5250/usb.c b/src/cpu/samsung/exynos5250/usb.c
index d8e07da..5084707 100644
--- a/src/cpu/samsung/exynos5250/usb.c
+++ b/src/cpu/samsung/exynos5250/usb.c
@@ -88,10 +88,11 @@ static void setup_usb_phy(struct usb_phy *usb, int hsic_gpio)
 	udelay(10);
 	clrbits_le32(&usb->hsicphyctrl1, HOST_CTRL0_PHYSWRST);
 
-	/* PHY clock and power setup time */
-	// FIXME If this happens more than 50ms before executing the payload,
-	// we might not need this delay.
-	mdelay(50);
+	/* At this point we need to wait for 50ms before talking to
+	 * the USB controller (PHY clock and power setup time)
+	 * By the time we are actually in the payload, these 50ms
+	 * will have passed.
+	 */
 }
 
 void usb_init(device_t dev)
diff --git a/src/cpu/samsung/exynos5420/dp.h b/src/cpu/samsung/exynos5420/dp.h
index d260c88..4d9d26b 100644
--- a/src/cpu/samsung/exynos5420/dp.h
+++ b/src/cpu/samsung/exynos5420/dp.h
@@ -1187,7 +1187,7 @@ static inline u32 exynos_fimd_get_base_offset(void)
 #define EXYNOS_DP_CLK_ENABLE				(1 << 1)
 #define EXYNOS_MIE_CLK_ENABLE				(3 << 0)
 
-#define DP_TIMEOUT_LOOP_COUNT		100
+#define DP_TIMEOUT_LOOP_COUNT		1000
 #define MAX_CR_LOOP			5
 #define MAX_EQ_LOOP			4
 
diff --git a/src/cpu/samsung/exynos5420/dp_lowlevel.c b/src/cpu/samsung/exynos5420/dp_lowlevel.c
index 64a2962..16b9a7f 100644
--- a/src/cpu/samsung/exynos5420/dp_lowlevel.c
+++ b/src/cpu/samsung/exynos5420/dp_lowlevel.c
@@ -452,7 +452,7 @@ unsigned int exynos_dp_detect_hpd(void)
 	while (exynos_dp_get_plug_in_status() != 0) {
 		if (timeout_loop == 0)
 			return -1;
-		mdelay(10);
+		mdelay(1);
 		timeout_loop--;
 	}
 
@@ -865,7 +865,7 @@ void exynos_dp_reset_macro(void)
 	lwrite32(reg, &dp_regs->phy_test);
 
 	/* 10 us is the minimum Macro reset time. */
-	mdelay(1);
+	udelay(50);
 
 	reg &= ~MACRO_RST;
 	lwrite32(reg, &dp_regs->phy_test);
diff --git a/src/cpu/samsung/exynos5420/usb.c b/src/cpu/samsung/exynos5420/usb.c
index 4d07699..6e79ef1 100644
--- a/src/cpu/samsung/exynos5420/usb.c
+++ b/src/cpu/samsung/exynos5420/usb.c
@@ -88,10 +88,11 @@ static void setup_usb_phy(struct usb_phy *usb, int hsic_gpio)
 	udelay(10);
 	clrbits_le32(&usb->hsicphyctrl1, HOST_CTRL0_PHYSWRST);
 
-	/* PHY clock and power setup time */
-	// FIXME If this happens more than 50ms before executing the payload,
-	// we might not need this delay.
-	mdelay(50);
+	/* At this point we need to wait for 50ms before talking to
+	 * the USB controller (PHY clock and power setup time)
+	 * By the time we are actually in the payload, these 50ms
+	 * will have passed.
+	 */
 }
 
 void usb_init(device_t dev)