[coreboot-gerrit] New patch to review for coreboot: 2c68dde Falco/Slippy: remove unwanted scratchpad writes
Isaac Christensen (isaac.christensen@se-eng.com)
gerrit at coreboot.org
Thu Aug 7 23:43:46 CEST 2014
Isaac Christensen (isaac.christensen at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6525
-gerrit
commit 2c68ddefaa8557939057d64162302b579c5ea561
Author: Furquan Shaikh <furquan at google.com>
Date: Tue Aug 13 16:09:33 2013 -0700
Falco/Slippy: remove unwanted scratchpad writes
Register range 0x4f000 - 0x4f08f includes scratchpad registers. Fastboot
works fine with these registers removed and graphics is initialized properly
Change-Id: Ic57c526a90619f4a073690440f6c5ac6ca96bf10
Signed-off-by: Furquan Shaikh <furquan at google.com>
Reviewed-on: https://gerrit.chromium.org/gerrit/65755
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Commit-Queue: Furquan Shaikh <furquan at chromium.org>
Tested-by: Furquan Shaikh <furquan at chromium.org>
(cherry picked from commit 7e7befdc3956cbc28d346545669cb55c566cf3ea)
Signed-off-by: Isaac Christensen <isaac.christensen at se-eng.com>
---
src/mainboard/google/slippy/gma.c | 14 --------
src/mainboard/google/slippy/i915io.c | 67 ------------------------------------
2 files changed, 81 deletions(-)
diff --git a/src/mainboard/google/slippy/gma.c b/src/mainboard/google/slippy/gma.c
index f2f93b1..b38cced 100644
--- a/src/mainboard/google/slippy/gma.c
+++ b/src/mainboard/google/slippy/gma.c
@@ -188,25 +188,11 @@ static void gma_fui_init(int noisy)
io_i915_write32(0x8000298e,CPU_VGACNTRL);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
io_i915_write32(0x00000000,_DSPBSURF);
- io_i915_write32(0x00000000,0x4f008);
- io_i915_write32(0x00000000,0x4f008);
- io_i915_write32(0x00000000,0x4f008);
- io_i915_write32(0x01000001,0x4f040);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000000,0x4f048);
- io_i915_write32(0x03030000,0x4f04c);
- io_i915_write32(0x00000000,0x4f050);
- io_i915_write32(0x00000001,0x4f054);
- io_i915_write32(0x00000000,0x4f058);
- io_i915_write32(0x03450000,0x4f04c);
- io_i915_write32(0x45450000,0x4f04c);
- io_i915_write32(0x03000400,0x4f000);
io_i915_write32( DP_LINK_TRAIN_PAT_1 | DP_LINK_TRAIN_PAT_1_CPT | DP_VOLTAGE_0_4 | DP_PRE_EMPHASIS_0 | DP_PORT_WIDTH_1 | DP_PLL_FREQ_270MHZ | DP_SCRAMBLING_DISABLE_IRONLAKE | DP_SYNC_VS_HIGH |0x00000091,DP_A);
io_i915_write32(0x00200090,_FDI_RXA_MISC);
io_i915_write32(0x0a000000,_FDI_RXA_MISC);
io_i915_write32(0x00000070,0x46408);
io_i915_write32(0x04000000,0x42090);
- io_i915_write32(0xc0000000,0x4f050);
io_i915_write32(0x00000000,0x9840);
io_i915_write32(0xa4000000,0x42090);
io_i915_write32(0x00001000,SOUTH_DSPCLK_GATE_D);
diff --git a/src/mainboard/google/slippy/i915io.c b/src/mainboard/google/slippy/i915io.c
index 92cb0d3..0801122 100644
--- a/src/mainboard/google/slippy/i915io.c
+++ b/src/mainboard/google/slippy/i915io.c
@@ -54,35 +54,13 @@ void runio(struct intel_dp *dp)
io_i915_write32(0x00ffffff,0x64ea8);
io_i915_write32(0x00040006,0x64eac);
io_i915_write32( PORTD_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |0x10100010,SDEISR+0x30);
- io_i915_write32(0x0000020c,0x4f054);
- intel_dp_wait_reg(0x0004f054, 0x0000020c);
- io_i915_write32(0x00000000,0x4f008);
- io_i915_write32(0x0000020c,0x4f054);
- intel_dp_wait_reg(0x0004f054, 0x0000020c);
- io_i915_write32(0x00000000,0x4f044);
- intel_dp_wait_reg(0x0004f044, 0x00000000);
- io_i915_write32(0x00000400,0x4f044);
- intel_dp_wait_reg(0x0004f044, 0x00000400);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x01000008,0x4f040);
- io_i915_write32(0x00000008,0x4f05c);
- io_i915_write32(0x00000008,0x4f060);
io_i915_write32(0x80000000,0x45400);
intel_dp_wait_reg(0x00045400, 0xc0000000);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000400,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x45450000,0x4f04c);
- io_i915_write32(0x45450000,0x4f04c);
- io_i915_write32(0x03000400,0x4f000);
io_i915_write32(0x8000298e,CPU_VGACNTRL);
- io_i915_write32(0x00000000,0x4f044);
io_i915_write32(0x00000000,_CURACNTR);
io_i915_write32(0x00000000,_CURABASE);
io_i915_write32((/* DISPPLANE_SEL_PIPE(0=A,1=B) */0x0<<24)|0x00000000,_DSPACNTR);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
- io_i915_write32(0x00000400,0x4f044);
io_i915_write32(0x00000000,_CURBCNTR_IVB);
io_i915_write32(0x00000000,_CURBBASE_IVB);
io_i915_write32(0x00000000,_DSPBCNTR);
@@ -93,27 +71,13 @@ void runio(struct intel_dp *dp)
io_i915_write32(0x00000000,_DVSASURF);
io_i915_write32(0x00008000,DEIIR);
intel_dp_wait_reg(0x00044008, 0x00000000);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000400,0x4f044);
- io_i915_write32(0x00000600,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x01000008,0x4f040);
- io_i915_write32(0x00000008,0x4f05c);
- io_i915_write32(0x00000008,0x4f060);
io_i915_write32(0x8020298e,CPU_VGACNTRL);
- io_i915_write32(0x00000000,0x4f044);
- intel_dp_wait_reg(0x0004f044, 0x00000000);
io_i915_write32(/*0x00000800*/dp->stride,_DSPASTRIDE);
io_i915_write32(0x00000000,_DSPAADDR);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
- io_i915_write32(0x00000000,0x4f044);
intel_dp_sink_dpms(dp, 0);
- io_i915_write32(0x00000001,0x4f008);
- io_i915_write32(0x00000012,0x4f014);
-
intel_dp_get_max_downspread(dp, &read_val);
intel_dp_set_m_n_regs(dp);
@@ -133,7 +97,6 @@ void runio(struct intel_dp *dp)
io_i915_write32((/* DISPPLANE_SEL_PIPE(0=A,1=B) */0x0<<24)|0x94000000,_DSPACNTR);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
io_i915_write32(0x00000080,DEIIR);
- intel_dp_wait_reg(0x00044008, 0x00000000);
io_i915_write32(0x00230000,TRANS_DDI_FUNC_CTL_EDP);
io_i915_write32(0x00000010,0x7f008);
@@ -172,9 +135,6 @@ void runio(struct intel_dp *dp)
io_i915_write32(0x03a903a9,BLC_PWM_PCH_CTL2);
io_i915_write32(0x80000000,BLC_PWM_PCH_CTL1);
- io_i915_write32(0x00000400,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
-
/* some of this is not needed. */
io_i915_write32( PORTD_HOTPLUG_ENABLE | PORTB_HOTPLUG_ENABLE |0x10100010,SDEISR+0x30);
io_i915_write32( DIGITAL_PORTA_HOTPLUG_ENABLE |0x00000010,DIGITAL_PORT_HOTPLUG_CNTRL);
@@ -183,29 +143,16 @@ void runio(struct intel_dp *dp)
io_i915_write32(0x00000000,DEIIR);
io_i915_write32(0x80000000,0x45400);
intel_dp_wait_reg(0x00045400, 0xc0000000);
- io_i915_write32(0x03200500,0x4f000);
- /* io_i915_write32(0x03000556,0x4f000); */
- io_i915_write32(0x03000400,0x4f000);
io_i915_write32(0x80000000,0x45400);
intel_dp_wait_reg(0x00045400, 0xc0000000);
printk(BIOS_SPEW, "pci dev(0x0,0x2,0x0,0x6)");
- io_i915_write32(0x03000400,0x4f000);
io_i915_write32(0x80000000,0x45400);
intel_dp_wait_reg(0x00045400, 0xc0000000);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000400,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x45430000,0x4f04c);
- io_i915_write32(0x43430000,0x4f04c);
- io_i915_write32(0x02580320,0x4f000);
io_i915_write32(0x8000298e,CPU_VGACNTRL);
- io_i915_write32(0x00000000,0x4f044);
io_i915_write32(0x00000000,_CURACNTR);
io_i915_write32(0x00000000,_CURABASE);
io_i915_write32((/* DISPPLANE_SEL_PIPE(0=A,1=B) */0x0<<24)|0x00000000,_DSPACNTR);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
- io_i915_write32(0x00000400,0x4f044);
io_i915_write32(0x00000000,_CURBCNTR_IVB);
io_i915_write32(0x00000000,_CURBBASE_IVB);
io_i915_write32(0x00000000,_DSPBCNTR);
@@ -216,23 +163,12 @@ void runio(struct intel_dp *dp)
io_i915_write32(0x00000000,_DVSASURF);
io_i915_write32(0x00008000,DEIIR);
intel_dp_wait_reg(0x00044008, 0x00000000);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
/* we just turned vdd off. We're not going to wait. The panel is up. */
- io_i915_write32(0x00000400,0x4f044);
- io_i915_write32(0x00000600,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
- io_i915_write32(0x01000008,0x4f040);
- io_i915_write32(0x00000008,0x4f05c);
- io_i915_write32(0x00000008,0x4f060);
io_i915_write32(0x8020298e,CPU_VGACNTRL);
- io_i915_write32(0x00000000,0x4f044);
- intel_dp_wait_reg(0x0004f044, 0x00000000);
io_i915_write32(/*0x00000640*/dp->stride,_DSPASTRIDE);
io_i915_write32(0x00000000,_DSPAADDR);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
- io_i915_write32(0x00000000,0x4f044);
io_i915_write32((/* DISPPLANE_SEL_PIPE(0=A,1=B) */0x0<<24)|0x00000000,_DSPACNTR);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
/* io_i915_write32(dp->pfa_pos,_PFA_WIN_POS); */
@@ -250,8 +186,6 @@ void runio(struct intel_dp *dp)
io_i915_write32((/* DISPPLANE_SEL_PIPE(0=A,1=B) */0x0<<24)|0x94000000,_DSPACNTR);
io_i915_write32((/* DISPPLANE_SEL_PIPE(0=A,1=B) */0x0<<24)|0x98000000,_DSPACNTR);
io_i915_write32(0x00000000,_DSPASIZE+0xc);
- io_i915_write32(0x00000400,0x4f044);
- io_i915_write32(0x00000000,0x4f044);
io_i915_write32( EDP_BLC_ENABLE | PANEL_POWER_RESET | PANEL_POWER_ON |0x00000007,PCH_PP_CONTROL);
@@ -260,5 +194,4 @@ void runio(struct intel_dp *dp)
io_i915_write32(0x00000000,SDEIIR);
io_i915_write32(0x00000000,SDEIIR);
io_i915_write32(0x00000000,DEIIR);
- io_i915_write32(0x00001800,0x4f044);
}
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