[coreboot-gerrit] Patch merged into coreboot/master: 79bff70 exynos5: Refactor board-specific parts out of USB PHY code

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 79bff70ac829f45b27650671f9c33028c4b8f6c7
Author: Julius Werner <jwerner at chromium.org>
Date:   Thu Aug 15 17:34:45 2013 -0700

    exynos5: Refactor board-specific parts out of USB PHY code
    
    This patch moves around some of the existing Exynos5 USB 2.0 PHY code
    to make it cleaner in preparation of the 3.0 PHYs. It moves the VBUS
    GPIOs (which are completely board-specific) into the mainboard code and
    makes sure to only initialize PHYs on the boards that actually need
    them. It also removes the USB 3.0 PLL hack that was needed on Snow from
    the Pit and Kirby boards (which do not have that PLL anymore).
    
    Change-Id: Ia35f47a765acff60481f0907f7448ec4f78e0937
    Signed-off-by: Julius Werner <jwerner at chromium.org>
    Reviewed-on: https://gerrit.chromium.org/gerrit/66887
    Reviewed-by: Stefan Reinauer <reinauer at google.com>
    (cherry picked from commit c3b1a8b687b535f4d5ac1b3bd2a4760151698fdb)
    Signed-off-by: Isaac Christensen <isaac.christensen at se-eng.com>
    Reviewed-on: http://review.coreboot.org/6609
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/6609 for details.

-gerrit