[coreboot-gerrit] Patch set updated for coreboot: 57f22de fsp_baytrail: update for UPD_SPD_CHECK macro

Martin Roth (gaumless@gmail.com) gerrit at coreboot.org
Wed Dec 3 05:23:05 CET 2014


Martin Roth (gaumless at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7489

-gerrit

commit 57f22defc5ba08c8f70868db9b3be010408afef9
Author: Martin Roth <martin.roth at se-eng.com>
Date:   Sun Nov 16 20:07:16 2014 -0700

    fsp_baytrail: update for UPD_SPD_CHECK macro
    
    Update chipset_fsp_util.c to use the UPD_SPD_CHECK macro.  This
    makes the code more standardized and easier to read.
    
    Change-Id: I9944e1a4df82e64a205598e98ed0f3b840af1019
    Signed-off-by: Martin Roth <martin.roth at se-eng.com>
---
 src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 13 ++-----------
 1 file changed, 2 insertions(+), 11 deletions(-)

diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
index 05284e2..bec3c07 100644
--- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
+++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c
@@ -83,17 +83,8 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U
 	UpdData->AzaliaConfigPtr = (UINT32)&mAzaliaConfig;
 
 	/* Set SPD addresses */
-	if (config->PcdMrcInitSPDAddr1 == SPD_ADDR_DISABLED)
-		UpdData->PcdMrcInitSPDAddr1 = 0x00;
-	else if (config->PcdMrcInitSPDAddr1 != SPD_ADDR_DEFAULT)
-		UpdData->PcdMrcInitSPDAddr1 = config->PcdMrcInitSPDAddr1;
-	printk(BIOS_DEBUG, "SPD Addr1:\t\t0x%02x\n", UpdData->PcdMrcInitSPDAddr1);
-
-	if (config->PcdMrcInitSPDAddr2 == SPD_ADDR_DISABLED)
-		UpdData->PcdMrcInitSPDAddr2 = 0x00;
-	else if (config->PcdMrcInitSPDAddr2 != SPD_ADDR_DEFAULT)
-		UpdData->PcdMrcInitSPDAddr2 = config->PcdMrcInitSPDAddr2;
-	printk(BIOS_DEBUG, "SPD Addr2:\t\t0x%02x\n", UpdData->PcdMrcInitSPDAddr2);
+	UPD_SPD_CHECK(PcdMrcInitSPDAddr1);
+	UPD_SPD_CHECK(PcdMrcInitSPDAddr2);
 
 	UPD_DEFAULT_CHECK(PcdSataMode);
 	UPD_DEFAULT_CHECK(PcdLpssSioEnablePciMode);



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