[coreboot-gerrit] Patch set updated for coreboot: 462b022 mainboard/hp/pavilion_m6_1035dx: Remove HUDSON_LEGACY_FREE

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7628

-gerrit

commit 462b022b5dc8dc71f2dc4fbb18a1be4436fec7ad
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Tue Dec 2 21:04:13 2014 +1100

    mainboard/hp/pavilion_m6_1035dx: Remove HUDSON_LEGACY_FREE
    
    The Embedded Controller sits behind the LPC bridge and so needs
    LPC decodes to be enabled.
    
    Remove the LPC decode enable out of agesawrapper.c. The enable
    is in fact done in: 'VOID FchInitResetLpcProgram(IN VOID *FchDataPtr)'
    which writes the magic '0xFF03FFD5' to register 0x44 of the PCI 14.3
    LPC Bridge to enable LPC decodes when HUDSON_LEGACY_FREE is not defined.
    
    Change-Id: Ia487d21faa0fceb2557dbce14ef8822116fada91
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/mainboard/hp/pavilion_m6_1035dx/Kconfig    | 4 ----
 src/mainboard/hp/pavilion_m6_1035dx/romstage.c | 4 ----
 2 files changed, 8 deletions(-)

diff --git a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
index 12e0579..30e50c1 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
+++ b/src/mainboard/hp/pavilion_m6_1035dx/Kconfig
@@ -69,8 +69,4 @@ config VGA_BIOS_ID
 	string
 	default "1002,9900"
 
-config HUDSON_LEGACY_FREE
-	bool
-	default y
-
 endif # BOARD_HP_PAVILION_M6_1035DX
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
index 9411ac8..d142a9d 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
@@ -40,10 +40,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 	u32 val;
 	agesawrapper_amdinitmmio();
 
-	/* Set LPC decode enables. */
-	pci_devfn_t dev = PCI_DEV(0, 0x14, 3);
-	pci_write_config32(dev, 0x44, 0xff03ffd5);
-
 	hudson_lpc_port80();
 
 	if (!cpu_init_detectedx && boot_cpu()) {