[coreboot-gerrit] New patch to review for coreboot: 41ac481 tegra124: Use correct mask for APB bus width

[Marc Jones (marc.jones@se-eng.com)]

Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7760

-gerrit

commit 41ac481982506456a9af65c3ae159ee3ff36cded
Author: David Hendricks <dhendrix at chromium.org>
Date:   Wed Apr 9 16:02:52 2014 -0700

    tegra124: Use correct mask for APB bus width
    
    It worked earlier since the APB and AHB bus widths occupy the same bits
    in their respective registers.
    
    BUG=none
    BRANCH=none
    TEST=tested on Nyan
    Signed-off-by: David Hendricks <dhendrix at chromium.org>
    
    Original-Change-Id: I9b18c648c60dcc4ad62ca1f514d253f8cccaeee7
    Original-Reviewed-on: https://chromium-review.googlesource.com/194478
    Original-Tested-by: David Hendricks <dhendrix at chromium.org>
    Original-Reviewed-by: Gabe Black <gabeblack at chromium.org>
    Original-Commit-Queue: David Hendricks <dhendrix at chromium.org>
    (cherry picked from commit 1d912302e9dcc9c6ba69e15434bb1841e1196208)
    Signed-off-by: Marc Jones <marc.jones at se-eng.com>
    
    Change-Id: I2ea7ac83d3501876df52018aed467ec33074817e
---
 src/soc/nvidia/tegra124/spi.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/nvidia/tegra124/spi.c b/src/soc/nvidia/tegra124/spi.c
index ac4bb7f..2e7c646 100644
--- a/src/soc/nvidia/tegra124/spi.c
+++ b/src/soc/nvidia/tegra124/spi.c
@@ -449,7 +449,7 @@ static void setup_dma_params(struct tegra_spi_channel *spi,
 {
 	/* APB bus width = 8-bits, address wrap for each word */
 	clrbits_le32(&dma->regs->apb_seq,
-			AHB_BUS_WIDTH_MASK << AHB_BUS_WIDTH_SHIFT);
+			APB_BUS_WIDTH_MASK << APB_BUS_WIDTH_SHIFT);
 	/* AHB 1 word burst, bus width = 32 bits (fixed in hardware),
 	 * no address wrapping */
 	clrsetbits_le32(&dma->regs->ahb_seq,