[coreboot-gerrit] New patch to review for coreboot: 611fc35 olivehillplus romstage.c: remove unuseful variable 'halt'

[WANG Siyuan (wangsiyuanbuaa@gmail.com)]

WANG Siyuan (wangsiyuanbuaa at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7847

-gerrit

commit 611fc354c63df679237ff60cb7e8517e87e9e349
Author: WANG Siyuan <wangsiyuanbuaa at gmail.com>
Date:   Wed Dec 17 17:30:54 2014 +0800

    olivehillplus romstage.c: remove unuseful variable 'halt'
    
    The variable 'halt' is not useful and result compile error because of
    Introduce halt() (commit 1b2f2a).
    
    Change-Id: Id67a0dcb192fb6478115e489f46bfb07021afd90
    Signed-off-by: WANG Siyuan <SiYuan.Wang at amd.com>
    Signed-off-by: WANG Siyuan <wangsiyuanbuaa at gmail.com>
---
 src/mainboard/amd/olivehillplus/romstage.c | 4 ----
 1 file changed, 4 deletions(-)

diff --git a/src/mainboard/amd/olivehillplus/romstage.c b/src/mainboard/amd/olivehillplus/romstage.c
index 367fa6a..f603d73 100644
--- a/src/mainboard/amd/olivehillplus/romstage.c
+++ b/src/mainboard/amd/olivehillplus/romstage.c
@@ -40,7 +40,6 @@
 void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 {
 	u32 val;
-	volatile int halt = 0;
 
 	/*
 	 *  In Hudson RRG, PMIOxD2[5:4] is "Drive strength control for
@@ -64,9 +63,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
 		console_init();
 	}
 
-	if(boot_cpu()) {
-		while(halt);
-	}
 	/* Halt if there was a built in self test failure */
 	post_code(0x34);
 	report_bist_failure(bist);