[coreboot-gerrit] Patch set updated for coreboot: db1cabc CBMEM: Tag chipsets with LATE_CBMEM_INIT
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Thu Dec 18 20:54:44 CET 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7850
-gerrit
commit db1cabc70d3a69874224ef4d622ccec263f262c5
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Thu Dec 18 08:41:02 2014 +0200
CBMEM: Tag chipsets with LATE_CBMEM_INIT
In preparation to remove the static CBMEM allocator, tag the chipsets
that still do not implement get_top_of_ram() for romstage.
The lack of CBMEM in romstage also implies no CAR migration.
Change-Id: Iad359db2e65ac15c54ff6e9635429628e4db6fde
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/Kconfig | 20 +++++++++++---------
src/include/cbmem.h | 15 +++++++++++----
src/northbridge/amd/agesa/Kconfig | 1 +
src/northbridge/amd/amdfam10/Kconfig | 1 +
src/northbridge/amd/amdk8/Kconfig | 1 +
src/northbridge/amd/gx2/Kconfig | 1 +
src/northbridge/amd/lx/Kconfig | 1 +
src/northbridge/dmp/vortex86ex/Kconfig | 1 +
src/northbridge/intel/e7501/Kconfig | 1 +
src/northbridge/intel/e7505/Kconfig | 1 +
src/northbridge/intel/i3100/Kconfig | 1 +
src/northbridge/intel/i440bx/Kconfig | 1 +
src/northbridge/intel/i440lx/Kconfig | 1 +
src/northbridge/intel/i5000/Kconfig | 1 +
src/northbridge/intel/i82810/Kconfig | 1 +
src/northbridge/intel/i82830/Kconfig | 1 +
src/northbridge/intel/i855/Kconfig | 1 +
src/northbridge/intel/sch/Kconfig | 1 +
src/northbridge/rdc/r8610/Kconfig | 1 +
src/northbridge/via/cn700/Kconfig | 1 +
src/northbridge/via/cx700/Kconfig | 1 +
src/northbridge/via/vx900/Kconfig | 1 +
src/southbridge/amd/amd8131/Kconfig | 1 +
23 files changed, 43 insertions(+), 13 deletions(-)
diff --git a/src/Kconfig b/src/Kconfig
index 7b52589..b94ccd2 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -149,18 +149,20 @@ config INCLUDE_CONFIG_FILE
(empty) 0x8e480 null 3610440
config EARLY_CBMEM_INIT
- bool
- default n
+ def_bool !LATE_CBMEM_INIT
+
+config LATE_CBMEM_INIT
+ def_bool n
+ depends on ARCH_X86
+ select BROKEN_CAR_MIGRATE
help
- Make coreboot initialize the CBMEM structures while running in ROM
- stage. This is useful when the ROM stage wants to communicate
- some, for instance, execution timestamps. It needs support in
- romstage.c and should be enabled by the board's Kconfig.
+ Enable this in chipset's Kconfig if northbridge does not implement
+ early get_top_of_ram() call for romstage. CBMEM tables will be
+ allocated late in ramstage, after PCI devices resources are known.
config BROKEN_CAR_MIGRATE
- bool
- default y if !EARLY_CBMEM_INIT && HAVE_ACPI_RESUME
- default n
+ def_bool n
+ depends on ARCH_X86
help
Many boards use CAR_GLOBAL but have no EARLY_CBMEM_INIT and
manage CAR migration on S3 resume path only. Couple boards use
diff --git a/src/include/cbmem.h b/src/include/cbmem.h
index b34cb18..51ecff0 100644
--- a/src/include/cbmem.h
+++ b/src/include/cbmem.h
@@ -114,6 +114,8 @@ void cbmem_initialize_empty(void);
* below 4GiB. */
void *cbmem_top(void);
+void cbmem_set_top(uint64_t ramtop);
+
/* Add a cbmem entry of a given size and id. These return NULL on failure. The
* add function performs a find first and do not check against the original
* size. */
@@ -146,13 +148,9 @@ u64 cbmem_entry_size(const struct cbmem_entry *entry);
#define HIGH_MEMORY_SIZE ALIGN_UP(_CBMEM_SZ_TOTAL, 0x10000)
-
#ifndef __PRE_RAM__
-void set_top_of_ram(uint64_t ramtop);
-void backup_top_of_ram(uint64_t ramtop);
void cbmem_late_set_table(uint64_t base, uint64_t size);
#endif
-
void get_cbmem_table(uint64_t *base, uint64_t *size);
struct cbmem_entry *get_cbmem_toc(void);
@@ -187,6 +185,15 @@ void cbmem_list(void);
void cbmem_print_entry(int n, u32 id, u64 start, u64 size);
#endif /* __PRE_RAM__ */
+/* These are for compatibility with old boards only. Any new chipset and board
+ * must implement get_top_of_ram() for both romstage and ramstage to support
+ * early features like COLLECT_TIMESTAMPS and CBMEM_CONSOLE.
+ */
+#if !defined(__PRE_RAM__)
+void set_top_of_ram(uint64_t ramtop);
+void backup_top_of_ram(uint64_t ramtop);
+#endif
+
#endif /* __ASSEMBLER__ */
diff --git a/src/northbridge/amd/agesa/Kconfig b/src/northbridge/amd/agesa/Kconfig
index 68551fb..8fd8bfd 100644
--- a/src/northbridge/amd/agesa/Kconfig
+++ b/src/northbridge/amd/agesa/Kconfig
@@ -20,6 +20,7 @@
config NORTHBRIDGE_AMD_AGESA
bool
default CPU_AMD_AGESA
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_AGESA
diff --git a/src/northbridge/amd/amdfam10/Kconfig b/src/northbridge/amd/amdfam10/Kconfig
index 0789ac3..13b912e 100644
--- a/src/northbridge/amd/amdfam10/Kconfig
+++ b/src/northbridge/amd/amdfam10/Kconfig
@@ -25,6 +25,7 @@ config NORTHBRIDGE_AMD_AMDFAM10
select HYPERTRANSPORT_PLUGIN_SUPPORT
select MMCONF_SUPPORT
select PER_DEVICE_ACPI_TABLES
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_AMDFAM10
config AGP_APERTURE_SIZE
diff --git a/src/northbridge/amd/amdk8/Kconfig b/src/northbridge/amd/amdk8/Kconfig
index 8bee5ca..65dc173 100644
--- a/src/northbridge/amd/amdk8/Kconfig
+++ b/src/northbridge/amd/amdk8/Kconfig
@@ -24,6 +24,7 @@ config NORTHBRIDGE_AMD_AMDK8
select HAVE_DEBUG_CAR
select HYPERTRANSPORT_PLUGIN_SUPPORT
select PER_DEVICE_ACPI_TABLES
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_AMDK8
config AGP_APERTURE_SIZE
diff --git a/src/northbridge/amd/gx2/Kconfig b/src/northbridge/amd/gx2/Kconfig
index dc347c4..1fe33f8 100644
--- a/src/northbridge/amd/gx2/Kconfig
+++ b/src/northbridge/amd/gx2/Kconfig
@@ -20,6 +20,7 @@
config NORTHBRIDGE_AMD_GX2
bool
select GEODE_VSA
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_GX2
diff --git a/src/northbridge/amd/lx/Kconfig b/src/northbridge/amd/lx/Kconfig
index d74d715..abc3e4c 100644
--- a/src/northbridge/amd/lx/Kconfig
+++ b/src/northbridge/amd/lx/Kconfig
@@ -1,6 +1,7 @@
config NORTHBRIDGE_AMD_LX
bool
select GEODE_VSA
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_AMD_LX
diff --git a/src/northbridge/dmp/vortex86ex/Kconfig b/src/northbridge/dmp/vortex86ex/Kconfig
index 7bf5235..74239ad 100644
--- a/src/northbridge/dmp/vortex86ex/Kconfig
+++ b/src/northbridge/dmp/vortex86ex/Kconfig
@@ -19,3 +19,4 @@
config NORTHBRIDGE_DMP_VORTEX86EX
bool
+ select LATE_CBMEM_INIT
diff --git a/src/northbridge/intel/e7501/Kconfig b/src/northbridge/intel/e7501/Kconfig
index 88c0b45..763b96e 100644
--- a/src/northbridge/intel/e7501/Kconfig
+++ b/src/northbridge/intel/e7501/Kconfig
@@ -2,4 +2,5 @@ config NORTHBRIDGE_INTEL_E7501
bool
select HAVE_DEBUG_RAM_SETUP
select PER_DEVICE_ACPI_TABLES
+ select LATE_CBMEM_INIT
diff --git a/src/northbridge/intel/e7505/Kconfig b/src/northbridge/intel/e7505/Kconfig
index ff7f5a5..e755852 100644
--- a/src/northbridge/intel/e7505/Kconfig
+++ b/src/northbridge/intel/e7505/Kconfig
@@ -26,6 +26,7 @@ config NORTHBRIDGE_SPECIFIC_OPTIONS # dummy
def_bool y
select HAVE_DEBUG_RAM_SETUP
select PER_DEVICE_ACPI_TABLES
+ select LATE_CBMEM_INIT
config HW_SCRUBBER
bool
diff --git a/src/northbridge/intel/i3100/Kconfig b/src/northbridge/intel/i3100/Kconfig
index 079004b..cb0bd38 100644
--- a/src/northbridge/intel/i3100/Kconfig
+++ b/src/northbridge/intel/i3100/Kconfig
@@ -1,5 +1,6 @@
config NORTHBRIDGE_INTEL_I3100
bool
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_INTEL_I3100
config DIMM_MAP_LOGICAL
diff --git a/src/northbridge/intel/i440bx/Kconfig b/src/northbridge/intel/i440bx/Kconfig
index 902eb73..c5cc43e 100644
--- a/src/northbridge/intel/i440bx/Kconfig
+++ b/src/northbridge/intel/i440bx/Kconfig
@@ -20,6 +20,7 @@
config NORTHBRIDGE_INTEL_I440BX
bool
select HAVE_DEBUG_RAM_SETUP
+ select LATE_CBMEM_INIT
config SDRAMPWR_4DIMM
bool
diff --git a/src/northbridge/intel/i440lx/Kconfig b/src/northbridge/intel/i440lx/Kconfig
index a88a7a1..1ccaac6 100644
--- a/src/northbridge/intel/i440lx/Kconfig
+++ b/src/northbridge/intel/i440lx/Kconfig
@@ -20,4 +20,5 @@
config NORTHBRIDGE_INTEL_I440LX
bool
select HAVE_DEBUG_RAM_SETUP
+ select LATE_CBMEM_INIT
diff --git a/src/northbridge/intel/i5000/Kconfig b/src/northbridge/intel/i5000/Kconfig
index f7344ca..3bd685a 100644
--- a/src/northbridge/intel/i5000/Kconfig
+++ b/src/northbridge/intel/i5000/Kconfig
@@ -22,6 +22,7 @@ config NORTHBRIDGE_INTEL_I5000
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
select HAVE_DEBUG_RAM_SETUP
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_INTEL_I5000
diff --git a/src/northbridge/intel/i82810/Kconfig b/src/northbridge/intel/i82810/Kconfig
index 79fe36a..723f751 100644
--- a/src/northbridge/intel/i82810/Kconfig
+++ b/src/northbridge/intel/i82810/Kconfig
@@ -20,6 +20,7 @@
config NORTHBRIDGE_INTEL_I82810
bool
select HAVE_DEBUG_RAM_SETUP
+ select LATE_CBMEM_INIT
choice
prompt "Onboard graphics"
diff --git a/src/northbridge/intel/i82830/Kconfig b/src/northbridge/intel/i82830/Kconfig
index 20b31a2..662840f 100644
--- a/src/northbridge/intel/i82830/Kconfig
+++ b/src/northbridge/intel/i82830/Kconfig
@@ -1,6 +1,7 @@
config NORTHBRIDGE_INTEL_I82830
bool
select HAVE_DEBUG_RAM_SETUP
+ select LATE_CBMEM_INIT
choice
prompt "Onboard graphics"
diff --git a/src/northbridge/intel/i855/Kconfig b/src/northbridge/intel/i855/Kconfig
index f5c2890..44becf6 100644
--- a/src/northbridge/intel/i855/Kconfig
+++ b/src/northbridge/intel/i855/Kconfig
@@ -1,6 +1,7 @@
config NORTHBRIDGE_INTEL_I855
bool
select HAVE_DEBUG_RAM_SETUP
+ select LATE_CBMEM_INIT
choice
prompt "Onboard graphics"
diff --git a/src/northbridge/intel/sch/Kconfig b/src/northbridge/intel/sch/Kconfig
index b8dad72..f495e6a 100644
--- a/src/northbridge/intel/sch/Kconfig
+++ b/src/northbridge/intel/sch/Kconfig
@@ -21,6 +21,7 @@ config NORTHBRIDGE_INTEL_SCH
bool
select MMCONF_SUPPORT
select PER_DEVICE_ACPI_TABLES
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_INTEL_SCH
diff --git a/src/northbridge/rdc/r8610/Kconfig b/src/northbridge/rdc/r8610/Kconfig
index 85461b7..e93a3e6 100644
--- a/src/northbridge/rdc/r8610/Kconfig
+++ b/src/northbridge/rdc/r8610/Kconfig
@@ -1,2 +1,3 @@
config NORTHBRIDGE_RDC_R8610
bool
+ select LATE_CBMEM_INIT
diff --git a/src/northbridge/via/cn700/Kconfig b/src/northbridge/via/cn700/Kconfig
index 34c330e..15c86eb 100644
--- a/src/northbridge/via/cn700/Kconfig
+++ b/src/northbridge/via/cn700/Kconfig
@@ -1,6 +1,7 @@
config NORTHBRIDGE_VIA_CN700
bool
select HAVE_DEBUG_RAM_SETUP
+ select LATE_CBMEM_INIT
# TODO: Values are from the CX700 datasheet, not sure if this matches CN700.
# TODO: What should be the per-chipset default value here?
diff --git a/src/northbridge/via/cx700/Kconfig b/src/northbridge/via/cx700/Kconfig
index 8f6e337..03014eb 100644
--- a/src/northbridge/via/cx700/Kconfig
+++ b/src/northbridge/via/cx700/Kconfig
@@ -5,6 +5,7 @@ config NORTHBRIDGE_VIA_CX700
select HAVE_HARD_RESET
select IOAPIC
select SMP
+ select LATE_CBMEM_INIT
# TODO: What should be the per-chipset default value here?
choice
diff --git a/src/northbridge/via/vx900/Kconfig b/src/northbridge/via/vx900/Kconfig
index 9fe5909..617074f 100644
--- a/src/northbridge/via/vx900/Kconfig
+++ b/src/northbridge/via/vx900/Kconfig
@@ -26,6 +26,7 @@ config NORTHBRIDGE_VIA_VX900
select HAVE_HARD_RESET
select MMCONF_SUPPORT
select MMCONF_SUPPORT_DEFAULT
+ select LATE_CBMEM_INIT
if NORTHBRIDGE_VIA_VX900
diff --git a/src/southbridge/amd/amd8131/Kconfig b/src/southbridge/amd/amd8131/Kconfig
index 6093a56..d7a7834 100644
--- a/src/southbridge/amd/amd8131/Kconfig
+++ b/src/southbridge/amd/amd8131/Kconfig
@@ -19,4 +19,5 @@
config SOUTHBRIDGE_AMD_AMD8131
bool
+ select LATE_CBMEM_INIT
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