[coreboot-gerrit] Patch set updated for coreboot: 74e4be1 CBMEM: Replace cbmem_reinit() with cbmemc_relocate()
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Fri Dec 19 14:11:04 CET 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7859
-gerrit
commit 74e4be1da7f725ceb4504107a044d2f7d97f9599
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Fri Dec 19 10:17:46 2014 +0200
CBMEM: Replace cbmem_reinit() with cbmemc_relocate()
This replaces need for separate cbmemc_reinit() calls made
via CAR_MIGRATE() that is not implemented for ARM.
Change-Id: If7b4d855c75df58b173f26ef3c90a4a7563166d3
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/arch/arm/cbmem.c | 3 +++
src/arch/arm64/cbmem.c | 3 +++
src/arch/riscv/cbmem.c | 3 +++
src/arch/x86/boot/cbmem.c | 3 +++
src/include/console/cbmem_console.h | 9 +++------
src/lib/cbmem.c | 4 +---
src/lib/cbmem_console.c | 10 +---------
src/lib/dynamic_cbmem.c | 10 ++++------
src/mainboard/google/nyan/romstage.c | 5 -----
src/mainboard/google/nyan_big/romstage.c | 5 -----
src/mainboard/google/nyan_blaze/romstage.c | 5 -----
src/mainboard/via/epia-m850/romstage.c | 1 -
src/soc/intel/fsp_baytrail/romstage/romstage.c | 1 -
13 files changed, 21 insertions(+), 41 deletions(-)
diff --git a/src/arch/arm/cbmem.c b/src/arch/arm/cbmem.c
index 339b71e..d146d51 100644
--- a/src/arch/arm/cbmem.c
+++ b/src/arch/arm/cbmem.c
@@ -16,9 +16,12 @@
*/
#include <cbmem.h>
+#include <console/cbmem_console.h>
void cbmem_arch_init(void)
{
+ /* Migrate preram_cbmem_console. */
+ __cbmemc_relocate();
}
void cbmem_fail_resume(void)
diff --git a/src/arch/arm64/cbmem.c b/src/arch/arm64/cbmem.c
index e333cfc..648b262 100644
--- a/src/arch/arm64/cbmem.c
+++ b/src/arch/arm64/cbmem.c
@@ -16,6 +16,7 @@
*/
#include <cbmem.h>
+#include <console/cbmem_console.h>
unsigned long get_top_of_ram(void);
@@ -31,6 +32,8 @@ void *cbmem_top(void)
void cbmem_arch_init(void)
{
+ /* Migrate preram_cbmem_console. */
+ __cbmemc_relocate();
}
void cbmem_fail_resume(void)
diff --git a/src/arch/riscv/cbmem.c b/src/arch/riscv/cbmem.c
index 339b71e..d146d51 100644
--- a/src/arch/riscv/cbmem.c
+++ b/src/arch/riscv/cbmem.c
@@ -16,9 +16,12 @@
*/
#include <cbmem.h>
+#include <console/cbmem_console.h>
void cbmem_arch_init(void)
{
+ /* Migrate preram_cbmem_console. */
+ __cbmemc_relocate();
}
void cbmem_fail_resume(void)
diff --git a/src/arch/x86/boot/cbmem.c b/src/arch/x86/boot/cbmem.c
index 920ca99..ba80013 100644
--- a/src/arch/x86/boot/cbmem.c
+++ b/src/arch/x86/boot/cbmem.c
@@ -17,6 +17,7 @@
#include <stdlib.h>
#include <console/console.h>
+#include <console/cbmem_console.h>
#include <cpu/x86/gdt.h>
#include <cbmem.h>
#include <arch/acpi.h>
@@ -72,6 +73,8 @@ void *cbmem_top(void)
void cbmem_arch_init(void)
{
+ /* Migrate preram_cbmem_console. */
+ __cbmemc_relocate();
#if !defined(__PRE_RAM__)
move_gdt();
diff --git a/src/include/console/cbmem_console.h b/src/include/console/cbmem_console.h
index 36d132c..22b6368 100644
--- a/src/include/console/cbmem_console.h
+++ b/src/include/console/cbmem_console.h
@@ -23,22 +23,19 @@
#include <stdint.h>
void cbmemc_init(void);
+void cbmemc_relocate(void);
void cbmemc_tx_byte(unsigned char data);
-#if CONFIG_CONSOLE_CBMEM
-void cbmemc_reinit(void);
-#else
-static inline void cbmemc_reinit(void) {}
-#endif
-
#define __CBMEM_CONSOLE_ENABLE__ CONFIG_CONSOLE_CBMEM && \
((ENV_ROMSTAGE && !CONFIG_BROKEN_CAR_MIGRATE) || ENV_RAMSTAGE)
#if __CBMEM_CONSOLE_ENABLE__
static inline void __cbmemc_init(void) { cbmemc_init(); }
+static inline void __cbmemc_relocate(void) { cbmemc_relocate(); }
static inline void __cbmemc_tx_byte(u8 data) { cbmemc_tx_byte(data); }
#else
static inline void __cbmemc_init(void) {}
+static inline void __cbmemc_relocate(void) {}
static inline void __cbmemc_tx_byte(u8 data) {}
#endif
diff --git a/src/lib/cbmem.c b/src/lib/cbmem.c
index 0b24ad2..11d5cab 100644
--- a/src/lib/cbmem.c
+++ b/src/lib/cbmem.c
@@ -23,7 +23,6 @@
#include <bootstate.h>
#include <cbmem.h>
#include <console/console.h>
-#include <console/cbmem_console.h>
#include <arch/early_variables.h>
#if CONFIG_HAVE_ACPI_RESUME && !defined(__PRE_RAM__)
#include <arch/acpi.h>
@@ -243,8 +242,8 @@ int cbmem_recovery(int is_wakeup)
cbmem_fail_resume();
}
- cbmem_arch_init();
car_migrate_variables();
+ cbmem_arch_init();
return !found;
}
@@ -256,7 +255,6 @@ static void init_cbmem_post_device(void *unused)
#else
cbmem_recovery(0);
#endif
- cbmemc_reinit();
}
BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
diff --git a/src/lib/cbmem_console.c b/src/lib/cbmem_console.c
index 997bb7d..7fcdfdc 100644
--- a/src/lib/cbmem_console.c
+++ b/src/lib/cbmem_console.c
@@ -184,15 +184,10 @@ static void copy_console_buffer(struct cbmem_console *new_cons_p)
new_cons_p->buffer_cursor = cursor;
}
-void cbmemc_reinit(void)
+void cbmemc_relocate(void)
{
struct cbmem_console *cbm_cons_p = NULL;
-#ifdef __PRE_RAM__
- if (IS_ENABLED(CONFIG_BROKEN_CAR_MIGRATE))
- return;
-#endif
-
#ifndef __PRE_RAM__
cbm_cons_p = cbmem_find(CBMEM_ID_CONSOLE);
#endif
@@ -216,6 +211,3 @@ void cbmemc_reinit(void)
current_console_set(cbm_cons_p);
}
-
-/* Call cbmemc_reinit() at CAR migration time. */
-CAR_MIGRATE(cbmemc_reinit)
diff --git a/src/lib/dynamic_cbmem.c b/src/lib/dynamic_cbmem.c
index 5eddbca..3fe7c4d 100644
--- a/src/lib/dynamic_cbmem.c
+++ b/src/lib/dynamic_cbmem.c
@@ -21,7 +21,6 @@
#include <bootmem.h>
#include <console/console.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <string.h>
#include <stdlib.h>
#include <arch/early_variables.h>
@@ -171,10 +170,11 @@ void cbmem_initialize_empty(void)
printk(BIOS_DEBUG, "CBMEM: root @ %p %d entries.\n",
root, root->max_entries);
- cbmem_arch_init();
-
/* Migrate cache-as-ram variables. */
car_migrate_variables();
+
+ cbmem_arch_init();
+
}
static inline int cbmem_fail_recovery(void)
@@ -249,10 +249,9 @@ int cbmem_initialize(void)
root->locked = 1;
#endif
- cbmem_arch_init();
-
/* Migrate cache-as-ram variables. */
car_migrate_variables();
+ cbmem_arch_init();
/* Recovery successful. */
return 0;
@@ -426,7 +425,6 @@ void *cbmem_entry_start(const struct cbmem_entry *entry)
static void init_cbmem_pre_device(void *unused)
{
cbmem_initialize();
- cbmemc_reinit();
}
BOOT_STATE_INIT_ENTRIES(cbmem_bscb) = {
diff --git a/src/mainboard/google/nyan/romstage.c b/src/mainboard/google/nyan/romstage.c
index b4e2733..8090d67 100644
--- a/src/mainboard/google/nyan/romstage.c
+++ b/src/mainboard/google/nyan/romstage.c
@@ -25,7 +25,6 @@
#include <device/device.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <console/console.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
@@ -213,10 +212,6 @@ static void __attribute__((noinline)) romstage(void)
configure_ec_spi_bus();
configure_tpm_i2c_bus();
-#if CONFIG_CONSOLE_CBMEM
- cbmemc_reinit();
-#endif
-
vboot_verify_firmware(romstage_handoff_find_or_add());
timestamp_add(TS_START_COPYRAM, timestamp_get());
diff --git a/src/mainboard/google/nyan_big/romstage.c b/src/mainboard/google/nyan_big/romstage.c
index b4e2733..8090d67 100644
--- a/src/mainboard/google/nyan_big/romstage.c
+++ b/src/mainboard/google/nyan_big/romstage.c
@@ -25,7 +25,6 @@
#include <device/device.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <console/console.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
@@ -213,10 +212,6 @@ static void __attribute__((noinline)) romstage(void)
configure_ec_spi_bus();
configure_tpm_i2c_bus();
-#if CONFIG_CONSOLE_CBMEM
- cbmemc_reinit();
-#endif
-
vboot_verify_firmware(romstage_handoff_find_or_add());
timestamp_add(TS_START_COPYRAM, timestamp_get());
diff --git a/src/mainboard/google/nyan_blaze/romstage.c b/src/mainboard/google/nyan_blaze/romstage.c
index b4e2733..8090d67 100644
--- a/src/mainboard/google/nyan_blaze/romstage.c
+++ b/src/mainboard/google/nyan_blaze/romstage.c
@@ -25,7 +25,6 @@
#include <device/device.h>
#include <cbfs.h>
#include <cbmem.h>
-#include <console/cbmem_console.h>
#include <console/console.h>
#include <romstage_handoff.h>
#include <vendorcode/google/chromeos/chromeos.h>
@@ -213,10 +212,6 @@ static void __attribute__((noinline)) romstage(void)
configure_ec_spi_bus();
configure_tpm_i2c_bus();
-#if CONFIG_CONSOLE_CBMEM
- cbmemc_reinit();
-#endif
-
vboot_verify_firmware(romstage_handoff_find_or_add());
timestamp_add(TS_START_COPYRAM, timestamp_get());
diff --git a/src/mainboard/via/epia-m850/romstage.c b/src/mainboard/via/epia-m850/romstage.c
index 899c5a6..7eb8d60 100644
--- a/src/mainboard/via/epia-m850/romstage.c
+++ b/src/mainboard/via/epia-m850/romstage.c
@@ -31,7 +31,6 @@
#include <cpu/x86/bist.h>
#include <string.h>
#include <timestamp.h>
-#include <console/cbmem_console.h>
#include "northbridge/via/vx900/early_vx900.h"
#include "northbridge/via/vx900/raminit.h"
diff --git a/src/soc/intel/fsp_baytrail/romstage/romstage.c b/src/soc/intel/fsp_baytrail/romstage/romstage.c
index 2619c96..f4442ac 100644
--- a/src/soc/intel/fsp_baytrail/romstage/romstage.c
+++ b/src/soc/intel/fsp_baytrail/romstage/romstage.c
@@ -43,7 +43,6 @@
#include <version.h>
#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
-#include <console/cbmem_console.h>
/* Return 0, 3, 4 or 5 to indicate the previous sleep state. */
uint32_t chipset_prev_sleep_state(uint32_t clear)
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