[coreboot-gerrit] New patch to review for coreboot: d4728ad Drop unused SMSC LPC47B272 SuperI/O
Stefan Reinauer (stefan.reinauer@coreboot.org)
gerrit at coreboot.org
Sat Dec 20 01:39:33 CET 2014
Stefan Reinauer (stefan.reinauer at coreboot.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7882
-gerrit
commit d4728adeba7c796a0dc993db061934351e1ee3a8
Author: Stefan Reinauer <reinauer at chromium.org>
Date: Thu Dec 18 11:57:03 2014 -0800
Drop unused SMSC LPC47B272 SuperI/O
Change-Id: I6d955ec1960f3ab62fc9015bc693a58b12961ea3
Signed-off-by: Stefan Reinauer <stefan.reinauer at coreboot.org>
---
src/superio/smsc/Kconfig | 2 -
src/superio/smsc/Makefile.inc | 1 -
src/superio/smsc/lpc47b272/Makefile.inc | 21 -----
src/superio/smsc/lpc47b272/early_serial.c | 53 ------------
src/superio/smsc/lpc47b272/lpc47b272.h | 33 --------
src/superio/smsc/lpc47b272/superio.c | 136 ------------------------------
6 files changed, 246 deletions(-)
diff --git a/src/superio/smsc/Kconfig b/src/superio/smsc/Kconfig
index 6aaa112..f6879e2 100644
--- a/src/superio/smsc/Kconfig
+++ b/src/superio/smsc/Kconfig
@@ -22,8 +22,6 @@ config SUPERIO_SMSC_FDC37M60X
bool
config SUPERIO_SMSC_FDC37N972
bool
-config SUPERIO_SMSC_LPC47B272
- bool
config SUPERIO_SMSC_LPC47B397
bool
config SUPERIO_SMSC_LPC47M10X
diff --git a/src/superio/smsc/Makefile.inc b/src/superio/smsc/Makefile.inc
index a89b6ac..5dde5ac 100644
--- a/src/superio/smsc/Makefile.inc
+++ b/src/superio/smsc/Makefile.inc
@@ -20,7 +20,6 @@
subdirs-y += fdc37m60x
subdirs-y += fdc37n972
-subdirs-y += lpc47b272
subdirs-y += lpc47b397
subdirs-y += lpc47m10x
subdirs-y += lpc47m15x
diff --git a/src/superio/smsc/lpc47b272/Makefile.inc b/src/superio/smsc/lpc47b272/Makefile.inc
deleted file mode 100644
index 680e937..0000000
--- a/src/superio/smsc/lpc47b272/Makefile.inc
+++ /dev/null
@@ -1,21 +0,0 @@
-##
-## This file is part of the coreboot project.
-##
-## Copyright (C) 2005 Digital Design Corporation
-##
-## This program is free software; you can redistribute it and/or modify
-## it under the terms of the GNU General Public License as published by
-## the Free Software Foundation; either version 2 of the License, or
-## (at your option) any later version.
-##
-## This program is distributed in the hope that it will be useful,
-## but WITHOUT ANY WARRANTY; without even the implied warranty of
-## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-## GNU General Public License for more details.
-##
-## You should have received a copy of the GNU General Public License
-## along with this program; if not, write to the Free Software
-## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
-##
-
-ramstage-$(CONFIG_SUPERIO_SMSC_LPC47B272) += superio.c
diff --git a/src/superio/smsc/lpc47b272/early_serial.c b/src/superio/smsc/lpc47b272/early_serial.c
deleted file mode 100644
index 3624df2..0000000
--- a/src/superio/smsc/lpc47b272/early_serial.c
+++ /dev/null
@@ -1,53 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* Pre-RAM driver for SMSC LPC47B272 Super I/O chip. */
-
-#include <arch/io.h>
-#include "lpc47b272.h"
-
-static void pnp_enter_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0x55, port);
-}
-
-static void pnp_exit_conf_state(pnp_devfn_t dev)
-{
- u16 port = dev >> 8;
- outb(0xaa, port);
-}
-
-/**
- * Configure the base I/O port of the specified serial device and enable the
- * serial device.
- *
- * @param dev High 8 bits = Super I/O port, low 8 bits = logical device number.
- * @param iobase Processor I/O port address to assign to this serial device.
- */
-static void lpc47b272_enable_serial(pnp_devfn_t dev, u16 iobase)
-{
- pnp_enter_conf_state(dev);
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 0);
- pnp_set_iobase(dev, PNP_IDX_IO0, iobase);
- pnp_set_enable(dev, 1);
- pnp_exit_conf_state(dev);
-}
diff --git a/src/superio/smsc/lpc47b272/lpc47b272.h b/src/superio/smsc/lpc47b272/lpc47b272.h
deleted file mode 100644
index cbfdb13..0000000
--- a/src/superio/smsc/lpc47b272/lpc47b272.h
+++ /dev/null
@@ -1,33 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#ifndef SUPERIO_SMSC_LPC47B272_LPC47B272_H
-#define SUPERIO_SMSC_LPC47B272_LPC47B272_H
-
-#define LPC47B272_FDC 0 /* Floppy */
-#define LPC47B272_PP 3 /* Parallel Port */
-#define LPC47B272_SP1 4 /* Com1 */
-#define LPC47B272_SP2 5 /* Com2 */
-#define LPC47B272_KBC 7 /* Keyboard & Mouse */
-#define LPC47B272_RT 10 /* Runtime reg*/
-
-#define LPC47B272_MAX_CONFIG_REGISTER 0x5F
-
-#endif
diff --git a/src/superio/smsc/lpc47b272/superio.c b/src/superio/smsc/lpc47b272/superio.c
deleted file mode 100644
index 4fac022..0000000
--- a/src/superio/smsc/lpc47b272/superio.c
+++ /dev/null
@@ -1,136 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2000 AG Electronics Ltd.
- * Copyright (C) 2003-2004 Linux Networx
- * Copyright (C) 2004 Tyan
- * Copyright (C) 2005 Digital Design Corporation
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-/* RAM driver for SMSC LPC47B272 Super I/O chip. */
-
-#include <arch/io.h>
-#include <device/device.h>
-#include <device/pnp.h>
-#include <superio/conf_mode.h>
-#include <console/console.h>
-#include <device/smbus.h>
-#include <string.h>
-#include <pc80/keyboard.h>
-#include <stdlib.h>
-#include "lpc47b272.h"
-
-/* Forward declarations */
-static void enable_dev(struct device *dev);
-static void lpc47b272_init(struct device *dev);
-// static void dump_pnp_device(struct device *dev);
-
-struct chip_operations superio_smsc_lpc47b272_ops = {
- CHIP_NAME("SMSC LPC47B272 Super I/O")
- .enable_dev = enable_dev
-};
-
-static struct device_operations ops = {
- .read_resources = pnp_read_resources,
- .set_resources = pnp_set_resources,
- .enable_resources = pnp_enable_resources,
- .enable = pnp_alt_enable,
- .init = lpc47b272_init,
- .ops_pnp_mode = &pnp_conf_mode_55_aa,
-};
-
-static struct pnp_info pnp_dev_info[] = {
- { &ops, LPC47B272_FDC, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, LPC47B272_PP, PNP_IO0 | PNP_IRQ0 | PNP_DRQ0, {0x07f8, 0}, },
- { &ops, LPC47B272_SP1, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, LPC47B272_SP2, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, LPC47B272_KBC, PNP_IO0 | PNP_IO1 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, {0x07ff, 4}, },
- { &ops, LPC47B272_RT, PNP_IO0, {0x0780, 0}, },
-};
-
-/**
- * Create device structures and allocate resources to devices specified in the
- * pnp_dev_info array (above).
- *
- * @param dev Pointer to structure describing a Super I/O device.
- */
-static void enable_dev(struct device *dev)
-{
- pnp_enable_devices(dev, &pnp_ops, ARRAY_SIZE(pnp_dev_info),
- pnp_dev_info);
-}
-
-/**
- * Initialize the specified Super I/O device.
- *
- * Devices other than COM ports and the keyboard controller are ignored.
- * For COM ports, we configure the baud rate.
- *
- * @param dev Pointer to structure describing a Super I/O device.
- */
-static void lpc47b272_init(struct device *dev)
-{
-
- if (!dev->enabled)
- return;
-
- switch(dev->path.pnp.device) {
- case LPC47B272_KBC:
- pc_keyboard_init();
- break;
- }
-}
-
-#if 0
-/**
- * Print the values of all of the LPC47B272's configuration registers.
- *
- * NOTE: The LPC47B272 must be in config mode when this function is called.
- *
- * @param dev Pointer to structure describing a Super I/O device.
- */
-static void dump_pnp_device(struct device *dev)
-{
- int i;
- print_debug("\n");
-
- for (i = 0; i <= LPC47B272_MAX_CONFIG_REGISTER; i++) {
- u8 register_value;
-
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
-
- /*
- * Skip over 'register' that would cause exit from
- * configuration mode.
- */
- if (i == 0xaa)
- register_value = 0xaa;
- else
- register_value = pnp_read_config(dev, i);
-
- print_debug_char(' ');
- print_debug_hex8(register_value);
- if ((i & 0x0f) == 0x0f)
- print_debug("\n");
- }
-
- print_debug("\n");
-}
-#endif
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