[coreboot-gerrit] Patch set updated for coreboot: bf88bdf ipq/arm: Redesign hooks for bootblock and add timer service
Marc Jones (marc.jones@se-eng.com)
gerrit at coreboot.org
Tue Dec 23 19:44:47 CET 2014
Marc Jones (marc.jones at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7879
-gerrit
commit bf88bdf144d578d11917ffe7b67485728d796ace
Author: Vadim Bendebury <vbendeb at chromium.org>
Date: Wed Apr 23 11:09:44 2014 -0700
ipq/arm: Redesign hooks for bootblock and add timer service
The IPQ timer service patch requires the additional squashed patches
to properly build all the different ARM boards.
ipq8064: make timer services available
Make sure it is initialized at different stages.
BUG=chrome-os-partner:27784
TEST=manual
. not much at this point, just verified that it compiles
Original-Change-Id: I343e7a6648e2ca935606cd76befd204aabd93726
Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/196592
(cherry picked from commit aedc41924313e5c21aef97b036f5a0643d59082d)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
ipq8064: storm: re-arrange bootblock initialization
The recent addition of the storm bootblock initialization broke
compilation of Exynos platforms. The SOC specific code needs to be
kept in the respective source files, not in the common CPU code.
As of now coreboot does not provide a separate SOC initialization API.
In general it makes sense to invoke SOC initialization from the board
initialization code, as the board knows what SOC it is running on.
Presently all what's need initialization on 8064 is the timer. This
patch adds the SOC initialization framework for 8064 and moves there
the related code.
BUG=chrome-os-partner:27784
TEST=manual
. nyan_big, peach_pit, and storm targets build fine now.
Original-Change-Id: Iae9a021f8cbf7d009770b02d798147a3e08420e8
Original-Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/197835
(cherry picked from commit 3ea7307b531b1a78c692e4f71a0d81b32108ebf0)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
arm: Redesign mainboard and SoC hooks for bootblock
This patch makes some slight changes to the way bootblock_cpu_init() and
bootblock_mainboard_init() are used on ARM. Experience has shown that
nearly every board needs either one or both of these hooks, so having
explicit Kconfigs for them has become unwieldy. Instead, this patch
implements them as a weak symbol that can be overridden by mainboard/SoC
code, as the more recent arm64_soc_init() is also doing.
Since the whole concept of a single "CPU" on ARM systems has kinda died
out, rename bootblock_cpu_init() to bootblock_soc_init(). (This had
already been done on Storm/ipq806x, which is now adjusted to directly
use the generic hook.) Also add a proper license header to
bootblock_common.h that was somehow missing.
Leaving non-ARM32 architectures out for now, since they are still using
the really old and weird x86 model of directly including a file. These
architectures should also eventually be aligned with the cleaner ARM32
model as they mature.
BRANCH=None
BUG=chrome-os-partner:32123
TEST=Booted on Pinky. Compiled for Storm and confirmed in the
disassembly that bootblock_soc_init() is still compiled in and called
right before the (now no-op) bootblock_mainboard_init().
Original-Change-Id: I57013b99c3af455cc3d7e78f344888d27ffb8d79
Original-Signed-off-by: Julius Werner <jwerner at chromium.org>
Original-Reviewed-on: https://chromium-review.googlesource.com/231940
Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
(cherry picked from commit 257aaee9e3aeeffe50ed54de7342dd2bc9baae76)
Signed-off-by: Marc Jones <marc.jones at se-eng.com>
Change-Id: Id055fe60a8caf63a9787138811dc69ac04dfba57
---
src/arch/arm/armv4/bootblock_simple.c | 5 ++++-
src/arch/arm/armv7/bootblock_simple.c | 5 ++++-
src/arch/arm/include/bootblock_common.h | 38 ++++++++++++++++++++++-----------
src/cpu/allwinner/a10/bootblock.c | 2 +-
src/cpu/armltd/cortex-a9/Kconfig | 6 ------
src/cpu/armltd/cortex-a9/bootblock.c | 17 ---------------
src/cpu/ti/am335x/bootblock.c | 2 +-
src/mainboard/google/storm/mainboard.c | 5 +++--
src/soc/qualcomm/ipq806x/Makefile.inc | 22 +++++++++++++++++++
src/soc/qualcomm/ipq806x/bootblock.c | 26 ++++++++++++++++++++++
src/soc/qualcomm/ipq806x/timer.c | 2 +-
src/soc/samsung/exynos5250/bootblock.c | 2 +-
src/soc/samsung/exynos5420/bootblock.c | 2 +-
13 files changed, 89 insertions(+), 45 deletions(-)
diff --git a/src/arch/arm/armv4/bootblock_simple.c b/src/arch/arm/armv4/bootblock_simple.c
index 207279b..15b6bde 100644
--- a/src/arch/arm/armv4/bootblock_simple.c
+++ b/src/arch/arm/armv4/bootblock_simple.c
@@ -26,12 +26,15 @@
#include <console/console.h>
#include <halt.h>
+__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
+__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
+
void main(void)
{
const char *stage_name = "fallback/romstage";
void *entry;
- bootblock_cpu_init();
+ bootblock_soc_init();
bootblock_mainboard_init();
if (CONFIG_BOOTBLOCK_CONSOLE) {
diff --git a/src/arch/arm/armv7/bootblock_simple.c b/src/arch/arm/armv7/bootblock_simple.c
index aad63b6..2fc000d 100644
--- a/src/arch/arm/armv7/bootblock_simple.c
+++ b/src/arch/arm/armv7/bootblock_simple.c
@@ -28,12 +28,15 @@
#include <halt.h>
#include <smp/node.h>
+__attribute__((weak)) void bootblock_soc_init(void) { /* do nothing */ }
+__attribute__((weak)) void bootblock_mainboard_init(void) { /* do nothing */ }
+
void main(void)
{
const char *stage_name = "fallback/romstage";
void *entry;
- bootblock_cpu_init();
+ bootblock_soc_init();
bootblock_mainboard_init();
#if CONFIG_BOOTBLOCK_CONSOLE
diff --git a/src/arch/arm/include/bootblock_common.h b/src/arch/arm/include/bootblock_common.h
index 034a12b..413a206 100644
--- a/src/arch/arm/include/bootblock_common.h
+++ b/src/arch/arm/include/bootblock_common.h
@@ -1,15 +1,27 @@
-#if CONFIG_CPU_HAS_BOOTBLOCK_INIT
-void bootblock_cpu_init(void);
-#else
-static void __attribute__((unused)) bootblock_cpu_init(void)
-{
-}
-#endif
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
-#if CONFIG_MAINBOARD_HAS_BOOTBLOCK_INIT
+#ifndef __ARCH_BOOTBLOCK_COMMON_H
+#define __ARCH_BOOTBLOCK_COMMON_H
+
+/* These are defined as weak no-ops that can be overridden by mainboard/SoC. */
void bootblock_mainboard_init(void);
-#else
-static void __attribute__((unused)) bootblock_mainboard_init(void)
-{
-}
-#endif
+void bootblock_soc_init(void);
+
+#endif /* __ARCH_BOOTBLOCK_COMMON_H */
diff --git a/src/cpu/allwinner/a10/bootblock.c b/src/cpu/allwinner/a10/bootblock.c
index d470755..808982c 100644
--- a/src/cpu/allwinner/a10/bootblock.c
+++ b/src/cpu/allwinner/a10/bootblock.c
@@ -10,7 +10,7 @@
#include <arch/cache.h>
#include <bootblock_common.h>
-void bootblock_cpu_init(void)
+void bootblock_soc_init(void)
{
uint32_t sctlr;
diff --git a/src/cpu/armltd/cortex-a9/Kconfig b/src/cpu/armltd/cortex-a9/Kconfig
index c456847..fb6cd0f 100644
--- a/src/cpu/armltd/cortex-a9/Kconfig
+++ b/src/cpu/armltd/cortex-a9/Kconfig
@@ -7,10 +7,4 @@ config CPU_ARMLTD_CORTEX_A9
if CPU_ARMLTD_CORTEX_A9
-config BOOTBLOCK_CPU_INIT
- string
- default "cpu/armltd/cortex-a9/bootblock.c"
- help
- CPU/SoC-specific bootblock code.
-
endif
diff --git a/src/cpu/armltd/cortex-a9/bootblock.c b/src/cpu/armltd/cortex-a9/bootblock.c
deleted file mode 100644
index 8925439..0000000
--- a/src/cpu/armltd/cortex-a9/bootblock.c
+++ /dev/null
@@ -1,17 +0,0 @@
-/*
- * Copyright (C) 2013 Google, Inc.
- *
- * This software is licensed under the terms of the GNU General Public
- * License version 2, as published by the Free Software Foundation, and
- * may be copied, distributed, and modified under those terms.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-void bootblock_cpu_init(void);
-void bootblock_cpu_init(void)
-{
-}
diff --git a/src/cpu/ti/am335x/bootblock.c b/src/cpu/ti/am335x/bootblock.c
index 04c9304..f586e17 100644
--- a/src/cpu/ti/am335x/bootblock.c
+++ b/src/cpu/ti/am335x/bootblock.c
@@ -22,7 +22,7 @@
#include <arch/cache.h>
#include <bootblock_common.h>
-void bootblock_cpu_init(void)
+void bootblock_soc_init(void)
{
uint32_t sctlr;
diff --git a/src/mainboard/google/storm/mainboard.c b/src/mainboard/google/storm/mainboard.c
index 0b0182f..89ed8da 100644
--- a/src/mainboard/google/storm/mainboard.c
+++ b/src/mainboard/google/storm/mainboard.c
@@ -1,7 +1,7 @@
/*
* This file is part of the coreboot project.
*
- * Copyright 2013 Google Inc.
+ * Copyright 2014 Google Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
@@ -17,11 +17,12 @@
* Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
-#include <device/device.h>
#include <boot/coreboot_tables.h>
+#include <device/device.h>
static void mainboard_init(device_t dev)
{
+ /* Not sure if this is needed at all */
}
static void mainboard_enable(device_t dev)
diff --git a/src/soc/qualcomm/ipq806x/Makefile.inc b/src/soc/qualcomm/ipq806x/Makefile.inc
index cffcc12..dfbbf3d 100644
--- a/src/soc/qualcomm/ipq806x/Makefile.inc
+++ b/src/soc/qualcomm/ipq806x/Makefile.inc
@@ -1,10 +1,32 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright 2014 Google Inc.
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; version 2 of the License.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
+bootblock-y += bootblock.c
bootblock-y += cbfs.c
bootblock-y += clock.c
bootblock-y += gpio.c
+bootblock-y += timer.c
romstage-y += cbfs.c
romstage-y += clock.c
romstage-y += gpio.c
+romstage-y += timer.c
ramstage-y += cbfs.c
ramstage-y += clock.c
diff --git a/src/soc/qualcomm/ipq806x/bootblock.c b/src/soc/qualcomm/ipq806x/bootblock.c
new file mode 100644
index 0000000..a079d42
--- /dev/null
+++ b/src/soc/qualcomm/ipq806x/bootblock.c
@@ -0,0 +1,26 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2014 Google Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <bootblock_common.h>
+#include <delay.h>
+
+void bootblock_soc_init(void)
+{
+ init_timer();
+}
diff --git a/src/soc/qualcomm/ipq806x/timer.c b/src/soc/qualcomm/ipq806x/timer.c
index 5c0dcb2..0d44e4a 100644
--- a/src/soc/qualcomm/ipq806x/timer.c
+++ b/src/soc/qualcomm/ipq806x/timer.c
@@ -40,7 +40,7 @@
#define GPT_FREQ (GPT_FREQ_KHZ * 1000) /* 32 KHz */
/**
- * timer_init - initialize timer
+ * init_timer - initialize timer
*/
void init_timer(void)
{
diff --git a/src/soc/samsung/exynos5250/bootblock.c b/src/soc/samsung/exynos5250/bootblock.c
index f524399..1f101d6 100644
--- a/src/soc/samsung/exynos5250/bootblock.c
+++ b/src/soc/samsung/exynos5250/bootblock.c
@@ -22,7 +22,7 @@
#include "clk.h"
#include "wakeup.h"
-void bootblock_cpu_init(void)
+void bootblock_soc_init(void)
{
/* kick off the multi-core timer.
* We want to do this as early as we can.
diff --git a/src/soc/samsung/exynos5420/bootblock.c b/src/soc/samsung/exynos5420/bootblock.c
index 5d2d2b7..d5f92ee 100644
--- a/src/soc/samsung/exynos5420/bootblock.c
+++ b/src/soc/samsung/exynos5420/bootblock.c
@@ -29,7 +29,7 @@
#define SRAM_SIZE 1
#define SRAM_END (SRAM_START + SRAM_SIZE) /* plus one... */
-void bootblock_cpu_init(void)
+void bootblock_soc_init(void)
{
/* kick off the multi-core timer.
* We want to do this as early as we can.
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