[coreboot-gerrit] New patch to review for coreboot: 32ce60b uart: Add single function for divisor calculation

Kyösti Mälkki (kyosti.malkki@gmail.com) gerrit at coreboot.org
Sat Feb 15 11:08:11 CET 2014


Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5229

-gerrit

commit 32ce60bfe4dc643ddaa82bc5c72f59ae07bb7673
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Sat Feb 15 10:21:59 2014 +0200

    uart: Add single function for divisor calculation
    
    Divisor is a function of requested baudrate and platform-specific
    clock used for UART reference. Combine this with the capability to
    read baudrate from option_table.
    
    When building without option_table or when there is no entry for
    baud_rate, CONFIG_TTYS0_BAUD is used.
    
    FIXME: Field for baudrate in lb_tables is still incorrect.
    
    Change-Id: I68539738469af780fadd3392263dd9b3d5964d2d
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
 src/arch/x86/lib/romcc_console.c         |  2 ++
 src/console/Makefile.inc                 |  6 ++--
 src/console/uart8250_console.c           |  1 -
 src/console/uart8250mem_console.c        |  1 -
 src/console/util.c                       | 54 ++++++++++++++++++++++++++++++++
 src/drivers/oxford/oxpcie/oxpcie_early.c |  8 ++++-
 src/include/uart8250.h                   |  3 ++
 src/lib/uart8250.c                       | 27 +---------------
 src/lib/uart8250mem.c                    | 24 +-------------
 9 files changed, 71 insertions(+), 55 deletions(-)

diff --git a/src/arch/x86/lib/romcc_console.c b/src/arch/x86/lib/romcc_console.c
index db84f9e..e517428 100644
--- a/src/arch/x86/lib/romcc_console.c
+++ b/src/arch/x86/lib/romcc_console.c
@@ -31,6 +31,8 @@
 #include <uart8250.h>
 #endif
 
+#include <console/util.c>
+
 #if CONFIG_CONSOLE_SERIAL8250
 #include "lib/uart8250.c"
 #endif
diff --git a/src/console/Makefile.inc b/src/console/Makefile.inc
index 54d59cd..8760012 100644
--- a/src/console/Makefile.inc
+++ b/src/console/Makefile.inc
@@ -1,5 +1,5 @@
 ramstage-y += printk.c
-ramstage-y += console.c
+ramstage-y += util.c console.c
 ramstage-y += vtxprintf.c
 ramstage-y += vsprintf.c
 ramstage-y += post.c
@@ -9,12 +9,12 @@ smm-$(CONFIG_DEBUG_SMI) += vtxprintf.c printk.c
 smm-$(CONFIG_SMM_TSEG) += die.c
 
 romstage-$(CONFIG_EARLY_CONSOLE) += vtxprintf.c
-romstage-y += console.c
+romstage-y += util.c console.c
 romstage-y += post.c
 romstage-y += die.c
 
 bootblock-$(CONFIG_BOOTBLOCK_CONSOLE) += vtxprintf.c
-bootblock-y += console.c
+bootblock-y += util.c console.c
 bootblock-y += die.c
 
 ramstage-$(CONFIG_CONSOLE_SERIAL8250) += uart8250_console.c
diff --git a/src/console/uart8250_console.c b/src/console/uart8250_console.c
index 330ed68..196412c 100644
--- a/src/console/uart8250_console.c
+++ b/src/console/uart8250_console.c
@@ -19,7 +19,6 @@
 
 #include <console/console.h>
 #include <uart8250.h>
-#include <pc80/mc146818rtc.h>
 
 static void ttyS0_init(void)
 {
diff --git a/src/console/uart8250mem_console.c b/src/console/uart8250mem_console.c
index ed77237..3833e47 100644
--- a/src/console/uart8250mem_console.c
+++ b/src/console/uart8250mem_console.c
@@ -19,7 +19,6 @@
 
 #include <console/console.h>
 #include <uart8250.h>
-#include <pc80/mc146818rtc.h>
 
 static u32 uart_bar = 0;
 
diff --git a/src/console/util.c b/src/console/util.c
new file mode 100644
index 0000000..5305f44
--- /dev/null
+++ b/src/console/util.c
@@ -0,0 +1,54 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <console/console.h>
+#include <uart8250.h>
+#include <pc80/mc146818rtc.h>
+#if CONFIG_USE_OPTION_TABLE
+#include "option_table.h"
+#endif
+
+#if CONFIG_CONSOLE_SERIAL
+/* Treat the default base frequency 115200 as a special case
+ * to avoid runtime division. Might help ROMCC builds.
+ */
+unsigned uart_divisor(unsigned basefreq)
+{
+	unsigned div = (basefreq / CONFIG_TTYS0_BAUD);
+
+#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
+	static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
+	static const unsigned baud[8] =
+		{ 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 };
+	unsigned b_index = 0;
+#if defined(__PRE_RAM__)
+	b_index = read_option(baud_rate, 0xff);
+#else
+	if (get_option(&b_index, "baud_rate") != CB_SUCCESS)
+		b_index = 0xff;
+#endif
+	if (b_index < 8) {
+		if (basefreq == 115200)
+			div = divisor[b_index];
+		else
+			div = (basefreq / baud[b_index]);
+	}
+#endif
+	return div;
+}
+
+#endif
diff --git a/src/drivers/oxford/oxpcie/oxpcie_early.c b/src/drivers/oxford/oxpcie/oxpcie_early.c
index d04e9d4..693c1e9 100644
--- a/src/drivers/oxford/oxpcie/oxpcie_early.c
+++ b/src/drivers/oxford/oxpcie/oxpcie_early.c
@@ -116,7 +116,13 @@ void oxford_init(void)
 	/* Now the UART initialization */
 	u32 uart0_base = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000;
 
-	uart8250_mem_init(uart0_base, (4000000 / CONFIG_TTYS0_BAUD));
+	unsigned div = uart_platform_divisor();
+	uart8250_mem_init(uart0_base, div);
 }
 
 #endif
+
+unsigned uart_platform_divisor(void)
+{
+	return uart_divisor(4000000);
+}
diff --git a/src/include/uart8250.h b/src/include/uart8250.h
index bec3637..83b4535 100644
--- a/src/include/uart8250.h
+++ b/src/include/uart8250.h
@@ -111,6 +111,9 @@
 #error Bad ttyS0 baud rate
 #endif
 
+unsigned uart_platform_divisor(void);
+unsigned uart_divisor(unsigned basefreq);
+
 #if CONFIG_CONSOLE_SERIAL8250
 unsigned char uart8250_rx_byte(unsigned base_port);
 int uart8250_can_rx_byte(unsigned base_port);
diff --git a/src/lib/uart8250.c b/src/lib/uart8250.c
index aa18d2a..bcb137a 100644
--- a/src/lib/uart8250.c
+++ b/src/lib/uart8250.c
@@ -20,13 +20,8 @@
 
 #include <arch/io.h>
 #include <uart8250.h>
-#include <pc80/mc146818rtc.h>
 #include <trace.h>
 
-#if CONFIG_USE_OPTION_TABLE
-#include "option_table.h"
-#endif
-
 /* Should support 8250, 16450, 16550, 16550A type UARTs */
 
 /* Expected character delay at 1200bps is 9ms for a working UART
@@ -107,26 +102,6 @@ void uart8250_init(unsigned base_port, unsigned divisor)
 
 void uart_init(void)
 {
-	/* TODO the divisor calculation is hard coded to standard UARTs. Some
-	 * UARTs won't work with these values. This should be a property of the
-	 * UART used, worst case a Kconfig variable. For now live with hard
-	 * codes as the only devices that might be different are the iWave
-	 * iRainbowG6 and the OXPCIe952 card (and the latter is memory mapped)
-	 */
-	unsigned int div = (115200 / CONFIG_TTYS0_BAUD);
-
-#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
-	static const unsigned char divisor[8] = { 1, 2, 3, 6, 12, 24, 48, 96 };
-	unsigned b_index = 0;
-#if defined(__PRE_RAM__)
-	b_index = read_option(baud_rate, 0);
-	b_index &= 7;
-	div = divisor[b_index];
-#else
-	if (get_option(&b_index, "baud_rate") == CB_SUCCESS)
-		div = divisor[b_index];
-#endif
-#endif
-
+	unsigned int div = uart_divisor(115200);
 	uart8250_init(CONFIG_TTYS0_BASE, div);
 }
diff --git a/src/lib/uart8250mem.c b/src/lib/uart8250mem.c
index 1482142..26c83fa 100644
--- a/src/lib/uart8250mem.c
+++ b/src/lib/uart8250mem.c
@@ -20,10 +20,6 @@
 
 #include <arch/io.h>
 #include <uart8250.h>
-#include <pc80/mc146818rtc.h>
-#if CONFIG_USE_OPTION_TABLE
-#include "option_table.h"
-#endif
 #include <device/device.h>
 #include <delay.h>
 
@@ -105,27 +101,11 @@ void uart8250_mem_init(unsigned base_port, unsigned divisor)
 
 u32 uart_mem_init(void)
 {
-	unsigned uart_baud = CONFIG_TTYS0_BAUD;
 	u32 uart_bar = 0;
-	unsigned div;
-
-	/* find out the correct baud rate */
-#if !defined(__SMM__) && CONFIG_USE_OPTION_TABLE
-	static const unsigned baud[8] = { 115200, 57600, 38400, 19200, 9600, 4800, 2400, 1200 };
-	unsigned b_index = 0;
-#if defined(__PRE_RAM__)
-	b_index = read_option(baud_rate, 0);
-	b_index &= 7;
-	uart_baud = baud[b_index];
-#else
-	if (get_option(&b_index, "baud_rate") == CB_SUCCESS)
-		uart_baud = baud[b_index];
-#endif
-#endif
+	unsigned div = uart_platform_divisor();
 
 	/* Now find the UART base address and calculate the divisor */
 #if CONFIG_DRIVERS_OXFORD_OXPCIE
-
 #if defined(MORE_TESTING) && !defined(__SIMPLE_DEVICE__)
 	device_t dev = dev_find_device(0x1415, 0xc158, NULL);
 	if (!dev)
@@ -144,8 +124,6 @@ u32 uart_mem_init(void)
 #endif
 	uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x1000; // 1st UART
 	// uart_bar = CONFIG_OXFORD_OXPCIE_BASE_ADDRESS + 0x2000; // 2nd UART
-
-	div = 4000000 / uart_baud;
 #endif
 
 	if (uart_bar)



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