[coreboot-gerrit] New patch to review for coreboot: dbcb1ce X201: Add missing LPC registers

[Vladimir Serbinenko (phcoder@gmail.com)]

Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4655

-gerrit

commit dbcb1ce5de2c2ff203df3afd0f161128fa3ad095
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date:   Sat Jan 11 05:48:17 2014 +0100

    X201: Add missing LPC registers
    
    Without them PMH7 is inaccessible from running system.
    
    Change-Id: Ib5a524325040e253a9d914906f90263fc208c313
    Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
 src/mainboard/lenovo/x201/devicetree.cb | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/mainboard/lenovo/x201/devicetree.cb b/src/mainboard/lenovo/x201/devicetree.cb
index f800f9a..eb1c55f 100644
--- a/src/mainboard/lenovo/x201/devicetree.cb
+++ b/src/mainboard/lenovo/x201/devicetree.cb
@@ -112,6 +112,10 @@ chip northbridge/intel/nehalem
 
 			register "gpe0_en" = "0x20022046"
 			register "alt_gp_smi_en" = "0x0000"
+			register "gen1_dec" = "0x7c1601"
+			register "gen2_dec" = "0x0c15e1"
+			register "gen3_dec" = "0x1c1681"
+			register "gen4_dec" = "0x040069"
 
 			device pci 16.2 on # IDE/SATA
 				subsystemid 0x17aa 0x2161