[coreboot-gerrit] New patch to review for coreboot: 5fb4a6a sandybridge: Add a parameter to skip mrc.cache usage.
Vladimir Serbinenko (phcoder@gmail.com)
gerrit at coreboot.org
Sun Jan 12 15:41:39 CET 2014
Vladimir Serbinenko (phcoder at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4677
-gerrit
commit 5fb4a6a73705252f6a40996b73980852ff0581c8
Author: Vladimir Serbinenko <phcoder at gmail.com>
Date: Sun Jan 12 14:41:40 2014 +0100
sandybridge: Add a parameter to skip mrc.cache usage.
On Lenovo X230 MRC fails if mrc.cache is supplied. Until
better solution is found, allow skipping mrc.cache.
Change-Id: If4f386dcbe3710e5ef0e7b8cda48489c929fdd5c
Signed-off-by: Vladimir Serbinenko <phcoder at gmail.com>
---
src/mainboard/google/butterfly/romstage.c | 2 +-
src/mainboard/google/link/romstage.c | 2 +-
src/mainboard/google/parrot/romstage.c | 2 +-
src/mainboard/google/stout/romstage.c | 2 +-
src/mainboard/intel/emeraldlake2/romstage.c | 2 +-
src/mainboard/kontron/ktqm77/romstage.c | 2 +-
src/mainboard/samsung/lumpy/romstage.c | 2 +-
src/mainboard/samsung/stumpy/romstage.c | 2 +-
src/northbridge/intel/sandybridge/raminit.c | 4 ++--
src/northbridge/intel/sandybridge/raminit.h | 2 +-
10 files changed, 11 insertions(+), 11 deletions(-)
diff --git a/src/mainboard/google/butterfly/romstage.c b/src/mainboard/google/butterfly/romstage.c
index 67e509e..0c1b7b5 100644
--- a/src/mainboard/google/butterfly/romstage.c
+++ b/src/mainboard/google/butterfly/romstage.c
@@ -232,7 +232,7 @@ void main(unsigned long bist)
post_code(0x3a);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3c);
diff --git a/src/mainboard/google/link/romstage.c b/src/mainboard/google/link/romstage.c
index 27a22f7..1d348cd 100644
--- a/src/mainboard/google/link/romstage.c
+++ b/src/mainboard/google/link/romstage.c
@@ -274,7 +274,7 @@ void main(unsigned long bist)
post_code(0x3a);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3c);
diff --git a/src/mainboard/google/parrot/romstage.c b/src/mainboard/google/parrot/romstage.c
index 2fe61d6..491881d 100644
--- a/src/mainboard/google/parrot/romstage.c
+++ b/src/mainboard/google/parrot/romstage.c
@@ -232,7 +232,7 @@ void main(unsigned long bist)
post_code(0x3a);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3c);
diff --git a/src/mainboard/google/stout/romstage.c b/src/mainboard/google/stout/romstage.c
index 8a961ea..b0bc03f 100644
--- a/src/mainboard/google/stout/romstage.c
+++ b/src/mainboard/google/stout/romstage.c
@@ -281,7 +281,7 @@ void main(unsigned long bist)
post_code(0x3a);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3b);
diff --git a/src/mainboard/intel/emeraldlake2/romstage.c b/src/mainboard/intel/emeraldlake2/romstage.c
index f116668..c100147 100644
--- a/src/mainboard/intel/emeraldlake2/romstage.c
+++ b/src/mainboard/intel/emeraldlake2/romstage.c
@@ -278,7 +278,7 @@ void main(unsigned long bist)
post_code(0x3a);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3b);
diff --git a/src/mainboard/kontron/ktqm77/romstage.c b/src/mainboard/kontron/ktqm77/romstage.c
index 773079d..85dac68 100644
--- a/src/mainboard/kontron/ktqm77/romstage.c
+++ b/src/mainboard/kontron/ktqm77/romstage.c
@@ -283,7 +283,7 @@ void main(unsigned long bist)
post_code(0x3a);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3c);
diff --git a/src/mainboard/samsung/lumpy/romstage.c b/src/mainboard/samsung/lumpy/romstage.c
index 6c87f88..0f36ae5 100644
--- a/src/mainboard/samsung/lumpy/romstage.c
+++ b/src/mainboard/samsung/lumpy/romstage.c
@@ -301,7 +301,7 @@ void main(unsigned long bist)
post_code(0x39);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3a);
diff --git a/src/mainboard/samsung/stumpy/romstage.c b/src/mainboard/samsung/stumpy/romstage.c
index ee715e7..0aea4b0 100644
--- a/src/mainboard/samsung/stumpy/romstage.c
+++ b/src/mainboard/samsung/stumpy/romstage.c
@@ -309,7 +309,7 @@ void main(unsigned long bist)
post_code(0x39);
pei_data.boot_mode = boot_mode;
timestamp_add_now(TS_BEFORE_INITRAM);
- sdram_initialize(&pei_data);
+ sdram_initialize(&pei_data, 0);
timestamp_add_now(TS_AFTER_INITRAM);
post_code(0x3a);
diff --git a/src/northbridge/intel/sandybridge/raminit.c b/src/northbridge/intel/sandybridge/raminit.c
index 333a6b5..69b3ce6 100644
--- a/src/northbridge/intel/sandybridge/raminit.c
+++ b/src/northbridge/intel/sandybridge/raminit.c
@@ -216,7 +216,7 @@ static void post_system_agent_init(struct pei_data *pei_data)
*
* @param pei_data: configuration data for UEFI PEI reference code
*/
-void sdram_initialize(struct pei_data *pei_data)
+void sdram_initialize(struct pei_data *pei_data, int skip_cache)
{
struct sys_info sysinfo;
unsigned long entry;
@@ -237,7 +237,7 @@ void sdram_initialize(struct pei_data *pei_data)
* Do not pass MRC data in for recovery mode boot,
* Always pass it in for S3 resume.
*/
- if (!recovery_mode_enabled() || pei_data->boot_mode == 2)
+ if ((!recovery_mode_enabled() || pei_data->boot_mode == 2) && !skip_cache)
prepare_mrc_cache(pei_data);
/* If MRC data is not found we cannot continue S3 resume. */
diff --git a/src/northbridge/intel/sandybridge/raminit.h b/src/northbridge/intel/sandybridge/raminit.h
index 2e9b1f3..ac317e6 100644
--- a/src/northbridge/intel/sandybridge/raminit.h
+++ b/src/northbridge/intel/sandybridge/raminit.h
@@ -29,7 +29,7 @@ struct sys_info {
#define BOOT_PATH_RESUME 2
} __attribute__ ((packed));
-void sdram_initialize(struct pei_data *pei_data);
+void sdram_initialize(struct pei_data *pei_data, int skip_cache);
int fixup_sandybridge_errata(void);
#endif /* RAMINIT_H */
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