[coreboot-gerrit] New patch to review for coreboot: 8adec79 baytrail: Rearrange config options alphanumerically

Aaron Durbin (adurbin@google.com) gerrit at coreboot.org
Tue Jan 28 03:54:53 CET 2014


Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4857

-gerrit

commit 8adec793386f1e0e2331199f70a404278f4c0edc
Author: Vadim Bendebury <vbendeb at chromium.org>
Date:   Fri Sep 27 16:21:04 2013 -0700

    baytrail: Rearrange config options alphanumerically
    
    This is a no-op change for easier maintenance.
    
    BUG=none
    TEST=manual
        . baitrail coreboot still builds and runs
    
    Change-Id: I0c0bd78c6f361e8f81979f19cce148e7f51865ee
    Signed-off-by: Vadim Bendebury <vbendeb at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/171002
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/baytrail/Kconfig | 29 +++++++++++++++--------------
 1 file changed, 15 insertions(+), 14 deletions(-)

diff --git a/src/soc/intel/baytrail/Kconfig b/src/soc/intel/baytrail/Kconfig
index e62ac0b..19ef1bb 100644
--- a/src/soc/intel/baytrail/Kconfig
+++ b/src/soc/intel/baytrail/Kconfig
@@ -8,24 +8,25 @@ if SOC_INTEL_BAYTRAIL
 
 config CPU_SPECIFIC_OPTIONS
 	def_bool y
-	select SMP
-	select SSE2
-	select UDELAY_TSC
-	select TSC_CONSTANT_RATE
-	select SMM_TSEG
-	select SMM_MODULES
-	select RELOCATABLE_MODULES
-	select DYNAMIC_CBMEM
-	select SUPPORT_CPU_UCODE_IN_CBFS
-	select TSC_SYNC_MFENCE
+	select CACHE_MRC_SETTINGS
+	select CACHE_ROM
 	select CAR_MIGRATION
+	select COLLECT_TIMESTAMPS
+	select CPU_MICROCODE_IN_CBFS
+	select DYNAMIC_CBMEM
+	select HAVE_SMI_HANDLER
 	select MMCONF_SUPPORT
 	select MMCONF_SUPPORT_DEFAULT
-	select HAVE_SMI_HANDLER
-	select CACHE_MRC_SETTINGS
-	select CACHE_ROM
+	select RELOCATABLE_MODULES
+	select SMM_MODULES
+	select SMM_TSEG
+	select SMP
 	select SPI_FLASH
-	select COLLECT_TIMESTAMPS
+	select SSE2
+	select SUPPORT_CPU_UCODE_IN_CBFS
+	select TSC_CONSTANT_RATE
+	select TSC_SYNC_MFENCE
+	select UDELAY_TSC
 
 config BOOTBLOCK_CPU_INIT
 	string



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