[coreboot-gerrit] Patch set updated for coreboot: d644a67 rambi: Enable SCC devices in ACPI mode
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Tue Jan 28 05:36:29 CET 2014
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5018
-gerrit
commit d644a6759f070757f4929aad50c93971e46fd2a0
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Thu Dec 12 15:51:52 2013 -0800
rambi: Enable SCC devices in ACPI mode
With the ACPI GNVS exported and depthcharge changed to
initialize eMMC in ACPI mode we can now put the SCC
devices into ACPI mode.
BUG=chrome-os-partner:24380
BRANCH=none
TEST=build and boot on rambi, test eMMC and SD card
Change-Id: I39716198f8227c0c3293ac23eb09660792e2c51b
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179901
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
src/mainboard/google/rambi/devicetree.cb | 3 +++
1 file changed, 3 insertions(+)
diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb
index bd54f00..bfb9e30 100644
--- a/src/mainboard/google/rambi/devicetree.cb
+++ b/src/mainboard/google/rambi/devicetree.cb
@@ -31,6 +31,9 @@ chip soc/intel/baytrail
register "sdcard_cap_low" = "0x036864b2"
register "sdcard_cap_high" = "0x0"
+ # Enable devices in ACPI mode
+ register "scc_acpi_mode" = "1"
+
# Enable PIPEA as DP_C
register "gpu_pipea_hotplug" = "6" # 6ms Pulse
register "gpu_pipea_port_select" = "2" # DP_C
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