[coreboot-gerrit] Patch set updated for coreboot: 3696299 lynxpoint: XHCI magic bits upated to new magic values
Patrick Georgi (patrick@georgi-clan.de)
gerrit at coreboot.org
Sat Jun 14 23:21:20 CEST 2014
Patrick Georgi (patrick at georgi-clan.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6014
-gerrit
commit 3696299fbd3dc8cab1ca5d0f220a4cc55549ee1e
Author: Duncan Laurie <dlaurie at chromium.org>
Date: Wed Aug 28 09:53:50 2013 -0700
lynxpoint: XHCI magic bits upated to new magic values
BUG=chrome-os-partner:22254
BRANCH=falco
TEST=emerge-falco chromeos-coreboot-falco
Original-Change-Id: I493a8cbbfdd958b855f6b4c01e03ee524be74c6e
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167050
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
(cherry picked from commit 226a66772768bf3c2f69e585984e52c0c270821f)
Change-Id: I800b02b511f9d188dd7a8e8d83139a8181346916
Signed-off-by: Matt DeVillier <matt.devillier at gmail.com>
Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/167312
Reviewed-by: Aaron Durbin <adurbin at chromium.org>
---
src/southbridge/intel/lynxpoint/usb_xhci.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/southbridge/intel/lynxpoint/usb_xhci.c b/src/southbridge/intel/lynxpoint/usb_xhci.c
index 500b578..23016fb 100644
--- a/src/southbridge/intel/lynxpoint/usb_xhci.c
+++ b/src/southbridge/intel/lynxpoint/usb_xhci.c
@@ -358,10 +358,10 @@ static void usb_xhci_init(device_t dev)
write32(mem_base + 0x8144, reg32);
if (pch_is_lp()) {
- /* XHCIBAR + 816Ch[19:0] = 000f0038h */
+ /* XHCIBAR + 816Ch[19:0] = 000e0038h */
reg32 = read32(mem_base + 0x816c);
reg32 &= ~0x000fffff;
- reg32 |= 0x000f0038;
+ reg32 |= 0x000e0038;
write32(mem_base + 0x816c, reg32);
/* D20:F0:B0h[17,14,13] = 100b */
More information about the coreboot-gerrit
mailing list