[coreboot-gerrit] New patch to review for coreboot: badbe85 AGESA boards: Use acpi_s3_resume_allowed()
Kyösti Mälkki (kyosti.malkki@gmail.com)
gerrit at coreboot.org
Wed Jun 18 04:58:12 CEST 2014
Kyösti Mälkki (kyosti.malkki at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/6067
-gerrit
commit badbe858233d8961cd0d4df23168a009ddd415d7
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date: Wed Jun 18 05:52:45 2014 +0300
AGESA boards: Use acpi_s3_resume_allowed()
Change-Id: Ibf5181d3eecb87ce647abe0be01072594b05aa5f
Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
---
src/mainboard/amd/olivehill/agesawrapper.c | 2 --
src/mainboard/amd/olivehill/romstage.c | 8 +++-----
src/mainboard/amd/parmer/agesawrapper.c | 2 --
src/mainboard/amd/parmer/romstage.c | 8 +++-----
src/mainboard/amd/persimmon/agesawrapper.c | 2 --
src/mainboard/amd/persimmon/romstage.c | 8 +++-----
src/mainboard/amd/thatcher/agesawrapper.c | 2 --
src/mainboard/amd/thatcher/romstage.c | 8 +++-----
src/mainboard/asrock/imb-a180/agesawrapper.c | 2 --
src/mainboard/asrock/imb-a180/romstage.c | 8 +++-----
src/mainboard/asus/f2a85-m/agesawrapper.c | 2 --
src/mainboard/asus/f2a85-m/romstage.c | 8 +++-----
src/mainboard/gizmosphere/gizmo/agesawrapper.c | 2 --
src/mainboard/gizmosphere/gizmo/romstage.c | 8 +++-----
src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c | 2 --
src/mainboard/hp/pavilion_m6_1035dx/romstage.c | 7 ++-----
src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c | 2 --
src/mainboard/jetway/nf81-t56n-lf/romstage.c | 7 ++-----
src/mainboard/lippert/frontrunner-af/agesawrapper.c | 2 --
src/mainboard/lippert/frontrunner-af/romstage.c | 8 +++-----
src/mainboard/lippert/toucan-af/agesawrapper.c | 2 --
src/mainboard/lippert/toucan-af/romstage.c | 8 +++-----
22 files changed, 31 insertions(+), 77 deletions(-)
diff --git a/src/mainboard/amd/olivehill/agesawrapper.c b/src/mainboard/amd/olivehill/agesawrapper.c
index 158e758..8e3cb61 100644
--- a/src/mainboard/amd/olivehill/agesawrapper.c
+++ b/src/mainboard/amd/olivehill/agesawrapper.c
@@ -425,7 +425,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@@ -627,7 +626,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (
diff --git a/src/mainboard/amd/olivehill/romstage.c b/src/mainboard/amd/olivehill/romstage.c
index 73cd40a..fbb90fa 100644
--- a/src/mainboard/amd/olivehill/romstage.c
+++ b/src/mainboard/amd/olivehill/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
@@ -94,9 +95,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@@ -112,7 +112,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
/* TODO: Disable cache is not ok. */
disable_cache_as_ram();
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -154,7 +153,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
outb(0xEA, 0xCD6);
outb(0x1, 0xcd7);
diff --git a/src/mainboard/amd/parmer/agesawrapper.c b/src/mainboard/amd/parmer/agesawrapper.c
index 55b31e1..85c1474 100644
--- a/src/mainboard/amd/parmer/agesawrapper.c
+++ b/src/mainboard/amd/parmer/agesawrapper.c
@@ -426,7 +426,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@@ -630,7 +629,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (
diff --git a/src/mainboard/amd/parmer/romstage.c b/src/mainboard/amd/parmer/romstage.c
index 668dfc8..3ee3d7a 100644
--- a/src/mainboard/amd/parmer/romstage.c
+++ b/src/mainboard/amd/parmer/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
@@ -78,9 +79,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@@ -95,7 +95,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -137,7 +136,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/amd/persimmon/agesawrapper.c b/src/mainboard/amd/persimmon/agesawrapper.c
index 8b7e48d..cfd0eee 100644
--- a/src/mainboard/amd/persimmon/agesawrapper.c
+++ b/src/mainboard/amd/persimmon/agesawrapper.c
@@ -433,7 +433,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@@ -565,7 +564,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (
diff --git a/src/mainboard/amd/persimmon/romstage.c b/src/mainboard/amd/persimmon/romstage.c
index 9ba34e7..1de6815 100644
--- a/src/mainboard/amd/persimmon/romstage.c
+++ b/src/mainboard/amd/persimmon/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
@@ -105,9 +106,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@@ -124,7 +124,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -166,7 +165,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/amd/thatcher/agesawrapper.c b/src/mainboard/amd/thatcher/agesawrapper.c
index 4a97a40..7ab9e44 100644
--- a/src/mainboard/amd/thatcher/agesawrapper.c
+++ b/src/mainboard/amd/thatcher/agesawrapper.c
@@ -423,7 +423,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@@ -632,7 +631,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (
diff --git a/src/mainboard/amd/thatcher/romstage.c b/src/mainboard/amd/thatcher/romstage.c
index 1a7a399..084e8d7 100644
--- a/src/mainboard/amd/thatcher/romstage.c
+++ b/src/mainboard/amd/thatcher/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
@@ -95,9 +96,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@@ -112,7 +112,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -154,7 +153,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/asrock/imb-a180/agesawrapper.c b/src/mainboard/asrock/imb-a180/agesawrapper.c
index 4e9e77b..083de3d 100644
--- a/src/mainboard/asrock/imb-a180/agesawrapper.c
+++ b/src/mainboard/asrock/imb-a180/agesawrapper.c
@@ -454,7 +454,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@@ -656,7 +655,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (
diff --git a/src/mainboard/asrock/imb-a180/romstage.c b/src/mainboard/asrock/imb-a180/romstage.c
index 8ce496b..daf91a6 100644
--- a/src/mainboard/asrock/imb-a180/romstage.c
+++ b/src/mainboard/asrock/imb-a180/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
@@ -118,9 +119,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@@ -136,7 +136,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
/* TODO: Disable cache is not ok. */
disable_cache_as_ram();
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -178,7 +177,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
outb(0xEA, 0xCD6);
outb(0x1, 0xcd7);
diff --git a/src/mainboard/asus/f2a85-m/agesawrapper.c b/src/mainboard/asus/f2a85-m/agesawrapper.c
index 7a25719..2a3502a 100644
--- a/src/mainboard/asus/f2a85-m/agesawrapper.c
+++ b/src/mainboard/asus/f2a85-m/agesawrapper.c
@@ -438,7 +438,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@@ -647,7 +646,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (
diff --git a/src/mainboard/asus/f2a85-m/romstage.c b/src/mainboard/asus/f2a85-m/romstage.c
index 3884e36..4953764 100644
--- a/src/mainboard/asus/f2a85-m/romstage.c
+++ b/src/mainboard/asus/f2a85-m/romstage.c
@@ -22,6 +22,7 @@
#include <arch/cpu.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <cbmem.h>
#include <console/console.h>
@@ -143,9 +144,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@@ -160,7 +160,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -202,7 +201,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/gizmosphere/gizmo/agesawrapper.c b/src/mainboard/gizmosphere/gizmo/agesawrapper.c
index becfb45..4b29128 100755
--- a/src/mainboard/gizmosphere/gizmo/agesawrapper.c
+++ b/src/mainboard/gizmosphere/gizmo/agesawrapper.c
@@ -453,7 +453,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@@ -585,7 +584,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (
diff --git a/src/mainboard/gizmosphere/gizmo/romstage.c b/src/mainboard/gizmosphere/gizmo/romstage.c
index 11ae623..9b8e53c 100755
--- a/src/mainboard/gizmosphere/gizmo/romstage.c
+++ b/src/mainboard/gizmosphere/gizmo/romstage.c
@@ -26,6 +26,7 @@
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
+#include <arch/acpi.h>
#include <cpu/x86/lapic.h>
#include <console/console.h>
#include <console/loglevel.h>
@@ -113,9 +114,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@@ -132,7 +132,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -174,7 +173,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
index 0174d42..23cdbfa 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/agesawrapper.c
@@ -436,7 +436,6 @@ agesawrapper_amdlaterunaptask (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32 agesawrapper_amdinitresume(VOID)
{
@@ -640,7 +639,6 @@ UINT32 agesawrapper_amdS3Save(VOID)
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdreadeventlog (
diff --git a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
index 2be2bc5..738d3f4 100644
--- a/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
+++ b/src/mainboard/hp/pavilion_m6_1035dx/romstage.c
@@ -75,9 +75,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitearly\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
val = agesawrapper_amdinitpost ();
if(val) {
@@ -92,7 +91,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
}
printk(BIOS_DEBUG, "Got past agesawrapper_amdinitenv\n");
disable_cache_as_ram();
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -134,7 +132,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c
index 7cd3899..ed70fc8 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/agesawrapper.c
@@ -394,7 +394,6 @@ AGESA_STATUS agesawrapper_amdinitlate(void)
return status;
}
-#if CONFIG_HAVE_ACPI_RESUME
AGESA_STATUS agesawrapper_amdinitresume(void)
{
AGESA_STATUS status;
@@ -517,7 +516,6 @@ AGESA_STATUS agesawrapper_amdS3Save(void)
return status;
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
AGESA_STATUS agesawrapper_amdlaterunaptask (
uint32_t Func,
diff --git a/src/mainboard/jetway/nf81-t56n-lf/romstage.c b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
index bfd24cb..3fcc20f 100644
--- a/src/mainboard/jetway/nf81-t56n-lf/romstage.c
+++ b/src/mainboard/jetway/nf81-t56n-lf/romstage.c
@@ -121,9 +121,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@@ -140,7 +139,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -182,7 +180,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif /* CONFIG_HAVE_ACPI_RESUME */
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/lippert/frontrunner-af/agesawrapper.c b/src/mainboard/lippert/frontrunner-af/agesawrapper.c
index 14c6cd0..99a32f4 100644
--- a/src/mainboard/lippert/frontrunner-af/agesawrapper.c
+++ b/src/mainboard/lippert/frontrunner-af/agesawrapper.c
@@ -452,7 +452,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@@ -584,7 +583,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (
diff --git a/src/mainboard/lippert/frontrunner-af/romstage.c b/src/mainboard/lippert/frontrunner-af/romstage.c
index 7146c01..dd21072 100644
--- a/src/mainboard/lippert/frontrunner-af/romstage.c
+++ b/src/mainboard/lippert/frontrunner-af/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
@@ -104,9 +105,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@@ -127,7 +127,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -169,7 +168,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
diff --git a/src/mainboard/lippert/toucan-af/agesawrapper.c b/src/mainboard/lippert/toucan-af/agesawrapper.c
index 14c6cd0..99a32f4 100644
--- a/src/mainboard/lippert/toucan-af/agesawrapper.c
+++ b/src/mainboard/lippert/toucan-af/agesawrapper.c
@@ -452,7 +452,6 @@ agesawrapper_amdinitlate (
return (UINT32)Status;
}
-#if CONFIG_HAVE_ACPI_RESUME
UINT32
agesawrapper_amdinitresume (
VOID
@@ -584,7 +583,6 @@ agesawrapper_amdS3Save (
return (UINT32)Status;
}
#endif /* #ifndef __PRE_RAM__ */
-#endif /* CONFIG_HAVE_ACPI_RESUME */
UINT32
agesawrapper_amdlaterunaptask (
diff --git a/src/mainboard/lippert/toucan-af/romstage.c b/src/mainboard/lippert/toucan-af/romstage.c
index accf381..9edc387 100644
--- a/src/mainboard/lippert/toucan-af/romstage.c
+++ b/src/mainboard/lippert/toucan-af/romstage.c
@@ -22,6 +22,7 @@
#include <device/pci_def.h>
#include <device/pci_ids.h>
#include <arch/io.h>
+#include <arch/acpi.h>
#include <arch/stages.h>
#include <device/pnp_def.h>
#include <arch/cpu.h>
@@ -105,9 +106,8 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
- if (!acpi_is_wakeup_early()) { /* Check for S3 resume */
-#endif
+ int s3resume = acpi_is_wakeup_early() && acpi_s3_resume_allowed();
+ if (!s3resume) {
post_code(0x40);
printk(BIOS_DEBUG, "agesawrapper_amdinitpost ");
val = agesawrapper_amdinitpost ();
@@ -128,7 +128,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
else
printk(BIOS_DEBUG, "passed.\n");
-#if CONFIG_HAVE_ACPI_RESUME
} else { /* S3 detect */
printk(BIOS_INFO, "S3 detected\n");
@@ -170,7 +169,6 @@ void cache_as_ram_main(unsigned long bist, unsigned long cpu_init_detectedx)
printk(BIOS_DEBUG, "System memory saved. OK to load ramstage.\n");
}
-#endif
post_code(0x50);
copy_and_run();
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