[coreboot-gerrit] New patch to review for coreboot: a2c79a9 i945: Fix the setting of Component ID (CID) in Element Self Description Register (ESD)

Mono Moosbart (mono@posteo.de) gerrit at coreboot.org
Sat Mar 15 21:34:04 CET 2014


Mono Moosbart (mono at posteo.de) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5387

-gerrit

commit a2c79a9302b31e606de7d29b3e10c68e79fa7ce3
Author: Mono <mono at posteo.de>
Date:   Sat Mar 15 21:27:18 2014 +0100

    i945: Fix the setting of Component ID (CID) in Element Self Description Register (ESD)
    
    CID can be written once only. The current implementation tries to write CID twice with the second write operation having no effect. Moreover, the current implementation does not make sure the reserved bits are not changed.
    
    Change-Id: Iea731951af2411cbada77ccdcaacca239e4ffdc6
    Signed-off-by: Mono <mono at posteo.de>
---
 src/northbridge/intel/i945/early_init.c | 5 +----
 1 file changed, 1 insertion(+), 4 deletions(-)

diff --git a/src/northbridge/intel/i945/early_init.c b/src/northbridge/intel/i945/early_init.c
index 57232af..8546c92 100644
--- a/src/northbridge/intel/i945/early_init.c
+++ b/src/northbridge/intel/i945/early_init.c
@@ -310,7 +310,6 @@ static void ich7_setup_dmi_rcrb(void)
 
 	RCBA32(V0CTL) = 0x80000001;
 	RCBA32(V1CAP) = 0x03128010;
-	RCBA32(ESD) = 0x00000810;
 	RCBA32(RP1D) = 0x01000003;
 	RCBA32(RP2D) = 0x02000002;
 	RCBA32(RP3D) = 0x03000002;
@@ -332,8 +331,6 @@ static void ich7_setup_dmi_rcrb(void)
 	reg32 |= (0x40 << 1) | (4 << 17) | (1 << 24) | (1 << 31);
 	RCBA32(V1CTL) = reg32;
 
-	RCBA32(ESD) |= (2 << 16);
-
 	RCBA32(ULD) |= (1 << 24) | (1 << 16);
 
 	RCBA32(ULBA) = DEFAULT_DMIBAR;
@@ -845,7 +842,7 @@ static void i945_setup_root_complex_topology(void)
 
 static void ich7_setup_root_complex_topology(void)
 {
-	RCBA32(0x104) = 0x00000802;
+	RCBA32(ESD) |= (2 << 16);
 	RCBA32(0x110) = 0x00000001;
 	RCBA32(0x114) = 0x00000000;
 	RCBA32(0x118) = 0x00000000;



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