[coreboot-gerrit] Patch set updated for coreboot: acbfc65 superio/fintek/f71869ad: Fix BSEL->WDT miss-naming.
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Mon Mar 24 06:54:55 CET 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5399
-gerrit
commit acbfc65a0fc2b1f0038bdc769947a9257e7a0fd7
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Sun Mar 23 04:39:40 2014 +1100
superio/fintek/f71869ad: Fix BSEL->WDT miss-naming.
Turns out LDN 0x07 is the WDT in the AD rev. of this
Fintek chip.
Change-Id: Ibe20515a5b348a32dc3e956b319aa34a398b67b4
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/superio/fintek/f71869ad/f71869ad.h | 2 +-
src/superio/fintek/f71869ad/superio.c | 4 ++--
2 files changed, 3 insertions(+), 3 deletions(-)
diff --git a/src/superio/fintek/f71869ad/f71869ad.h b/src/superio/fintek/f71869ad/f71869ad.h
index abc0260..5947b32 100644
--- a/src/superio/fintek/f71869ad/f71869ad.h
+++ b/src/superio/fintek/f71869ad/f71869ad.h
@@ -29,7 +29,7 @@
#define F71869AD_HWM 0x04 /* Hardware monitor */
#define F71869AD_KBC 0x05 /* PS/2 keyboard and mouse */
#define F71869AD_GPIO 0x06 /* General Purpose I/O (GPIO) */
-#define F71869AD_BSEL 0x07 /* BSEL */
+#define F71869AD_WDT 0x07 /* WDT */
#define F71869AD_PME 0x0a /* Power Management Events (PME) and ACPI */
void f71869ad_enable_serial(device_t dev, u16 iobase);
diff --git a/src/superio/fintek/f71869ad/superio.c b/src/superio/fintek/f71869ad/superio.c
index dbcb812..9325bac 100644
--- a/src/superio/fintek/f71869ad/superio.c
+++ b/src/superio/fintek/f71869ad/superio.c
@@ -99,7 +99,7 @@ static struct device_operations ops = {
* irq 0x72 = 12 # Mouse IRQ
* end
* device pnp 4e.06 off end # GPIO
- * device pnp 4e.07 on end # BSEL
+ * device pnp 4e.07 on end # WDT
* device pnp 4e.0a off end # PME
* end # f71869ad
*
@@ -112,7 +112,7 @@ static struct pnp_info pnp_dev_info[] = {
{ &ops, F71869AD_HWM, PNP_IO0 | PNP_IRQ0, {0x0ff8, 0}, },
{ &ops, F71869AD_KBC, PNP_IO0 | PNP_IRQ0 | PNP_IRQ1, {0x07ff, 0}, },
{ &ops, F71869AD_GPIO, PNP_IO0 | PNP_IRQ0, {0x07f8, 0}, },
- { &ops, F71869AD_BSEL, PNP_IO0, {0x07f8, 0}, },
+ { &ops, F71869AD_WDT, PNP_IO0, {0x07f8, 0}, },
{ &ops, F71869AD_PME, },
};
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