[coreboot-gerrit] Patch merged into coreboot/master: 59cd621 rambi: enable SCI and SMI gpios

gerrit at coreboot.org gerrit at coreboot.org
Tue May 6 18:39:51 CEST 2014


the following patch was just integrated into master:
commit 59cd6216dd430db7488448b0c68aa7024690e179
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Mon Nov 11 14:58:06 2013 -0600

    rambi: enable SCI and SMI gpios
    
    Rambi has 3 pins that need to be configured for SCI and SMI:
    
    1. GPIO_CORE[0] - runtime SCI pin
    2. GPIO_SUS[7] - SMI for firmware lid events
    3. GPIO_SUS[0] - wake pin for S3 wakes from EC.
    
    Configure these pins now that the rest of the infrastructure
    is in place. The one thing that is yet to work is runtime SCI
    for lid events once booted.
    
    BUG=chrome-os-partner:23505
    BRANCH=None
    TEST=built and booted. lid close at rec screen works. And wake
         from S3 with a keyboard press works.
    
    Change-Id: I5f8e38ec5f4cf1a8ef7aa7fcee9abc344d9b184f
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/176393
    Reviewed-on: http://review.coreboot.org/4960
    Tested-by: build bot (Jenkins)
    Reviewed-by: Kyösti Mälkki <kyosti.malkki at gmail.com>


See http://review.coreboot.org/4960 for details.

-gerrit



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