[coreboot-gerrit] Patch set updated for coreboot: c2d509f superio/ite/it8728f: RAMstage PNP configuration component

Edward O'Callaghan (eocallaghan@alterapraxis.com) gerrit at coreboot.org
Thu May 8 10:25:12 CEST 2014


Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5668

-gerrit

commit c2d509ff6ef015998cca65c0b78c5b520761709e
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date:   Tue May 6 18:00:07 2014 +1000

    superio/ite/it8728f: RAMstage PNP configuration component
    
    Provide devicetree.cb RAMstage configuration of this superio component.
    
    Change-Id: I376d2fb6dafc301cbc437518012f8c43b0af4be2
    Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
 src/superio/ite/it8728f/Makefile.inc       |  2 +
 src/superio/ite/it8728f/chip.h             | 34 +++++++++++++
 src/superio/ite/it8728f/it8728f_hwm.c      | 80 ++++++++++++++++++++++++++++++
 src/superio/ite/it8728f/it8728f_internal.h | 28 +++++++++++
 src/superio/ite/it8728f/superio.c          | 69 ++++++++++++++++++++++++++
 5 files changed, 213 insertions(+)

diff --git a/src/superio/ite/it8728f/Makefile.inc b/src/superio/ite/it8728f/Makefile.inc
index d8d4f6a..a146db8 100644
--- a/src/superio/ite/it8728f/Makefile.inc
+++ b/src/superio/ite/it8728f/Makefile.inc
@@ -19,3 +19,5 @@
 ##
 
 romstage-$(CONFIG_SUPERIO_ITE_IT8728F) += early_serial.c
+ramstage-$(CONFIG_SUPERIO_ITE_IT8728F) += it8728f_hwm.c
+ramstage-$(CONFIG_SUPERIO_ITE_IT8728F) += superio.c
diff --git a/src/superio/ite/it8728f/chip.h b/src/superio/ite/it8728f/chip.h
new file mode 100644
index 0000000..998685f
--- /dev/null
+++ b/src/superio/ite/it8728f/chip.h
@@ -0,0 +1,34 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_ITE_IT8728F_CHIP_H
+#define SUPERIO_ITE_IT8728F_CHIP_H
+
+struct superio_ite_it8728f_config {
+	/* HWM configuration registers */
+	uint8_t hhwm_ctl_register;
+	uint8_t hhwm_main_ctl_register;
+	uint8_t hhwm_adc_temp_chan_en_reg;
+	uint8_t hhwm_fan1_ctl_pwm;
+	uint8_t hhwm_fan2_ctl_pwm;
+	uint8_t hhwm_fan3_ctl_pwm;
+};
+
+#endif /* SUPERIO_ITE_IT8728F_CHIP_H */
diff --git a/src/superio/ite/it8728f/it8728f_hwm.c b/src/superio/ite/it8728f/it8728f_hwm.c
new file mode 100644
index 0000000..01eae2a
--- /dev/null
+++ b/src/superio/ite/it8728f/it8728f_hwm.c
@@ -0,0 +1,80 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <console/console.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include "chip.h"
+#include "ite_internal.h"
+
+/*
+ * FAN controller configuration register index's
+ */
+#define HWM_MAIN_CTL_REG		 0x13	/* default 0x07 */
+#define HWM_CTL_REG				 0x14	/* default 0x40 */
+#define HWM_FAN1_CTL_PWM		 0x15	/* default 0x00 */
+#define HWM_FAN2_CTL_PWM		 0x16	/* default 0x00 */
+#define HWM_FAN3_CTL_PWM		 0x17	/* default 0x00 */
+#define HWM_ADC_TEMP_CHAN_EN_REG 0x51	/* default 0x00 */
+
+static void pnp_write_index(u16 port, u8 reg, u8 value)
+{
+	outb(reg, port);
+	outb(value, port + 1);
+}
+
+void it8728f_ec_init(device_t dev)
+{
+	struct superio_ite_it8728f_config *conf = dev->chip_info;
+	struct resource *res = find_resource(dev, PNP_IDX_IO0);
+
+	if (!res) {
+		printk(BIOS_WARNING, "Super I/O HWM: No HWM resource found.\n");
+		return;
+	}
+	u16 port = res->base;
+
+	printk(BIOS_INFO,
+		"ITE IT8728F Super I/O HWM: Initializing Hardware Monitor..\n");
+	printk(BIOS_DEBUG,
+		"ITE IT8728F Super I/O HWM: Base Address at 0x%x\n", port);
+
+	pnp_enter_conf_mode(dev);
+	pnp_set_logical_device(dev);
+
+	/* ITE IT8728F HWM (ordered) programming sequence. */
+
+	/* configure fan polarity */
+	pnp_write_index(port, HWM_CTL_REG, conf->hwm_ctl_register);
+
+	/* enable fans 1-3 */
+	pnp_write_index(port, HWM_MAIN_CTL_REG, conf->hwm_main_ctl_register);
+
+	/* enable termistor temps for temp1-temp3 */
+	pnp_write_index(port, HWM_ADC_TEMP_CHAN_EN_REG, conf->hwm_adc_temp_chan_en_reg);
+
+	/* configure which fanX uses which tempY */
+	pnp_write_index(port, HWM_FAN1_CTL_PWM, conf->hwm_fan1_ctl_pwm);
+	pnp_write_index(port, HWM_FAN2_CTL_PWM, conf->hwm_fan2_ctl_pwm);
+	pnp_write_index(port, HWM_FAN3_CTL_PWM, conf->hwm_fan3_ctl_pwm);
+
+	pnp_exit_conf_mode(dev);
+}
diff --git a/src/superio/ite/it8728f/it8728f_internal.h b/src/superio/ite/it8728f/it8728f_internal.h
new file mode 100644
index 0000000..ece41b9
--- /dev/null
+++ b/src/superio/ite/it8728f/it8728f_internal.h
@@ -0,0 +1,28 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef SUPERIO_ITE_IT8728F_INTERNAL_H
+#define SUPERIO_ITE_IT8728F_INTERNAL_H
+
+#include <device/device.h>
+
+void hwm_init(device_t dev);
+
+#endif /* SUPERIO_ITE_IT8728F_INTERNAL_H */
diff --git a/src/superio/ite/it8728f/superio.c b/src/superio/ite/it8728f/superio.c
new file mode 100644
index 0000000..45aea0f
--- /dev/null
+++ b/src/superio/ite/it8728f/superio.c
@@ -0,0 +1,69 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright (C) 2014 Edward O'Callaghan <eocallaghan at alterapraxis.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#include <arch/io.h>
+#include <device/device.h>
+#include <device/pnp.h>
+#include <superio/conf_mode.h>
+#include <console/console.h>
+#include <stdlib.h>
+
+#include "chip.h"
+#include "it8728f.h"
+#include "it8728f_internal.h"
+
+static void it8728f_init(device_t dev)
+{
+	struct superio_ite_it8728f_config *conf = dev->chip_info;
+
+	if (!dev->enabled)
+		return;
+
+	switch(dev->path.pnp.device) {
+	/* TODO: Might potentially need code for HWM or FDC etc. */
+    case IT8728F_EC:
+		it8728f_ec_init(dev);
+		break;
+	}
+}
+
+static struct device_operations ops = {
+	.read_resources   = pnp_read_resources,
+	.set_resources    = pnp_set_resources,
+	.enable_resources = pnp_enable_resources,
+	.enable           = pnp_alt_enable,
+	.init             = it8728f_init,
+	.ops_pnp_mode     = &pnp_conf_mode_870155_aa,
+};
+
+/* TODO: incomplete */
+static struct pnp_info pnp_dev_info[] = {
+	{ &ops, IT8728F_EC, PNP_IO0 | PNP_IO1 | PNP_IRQ0, {0x0ff8, 0}, {0x0ff8, 4}, },
+};
+
+static void enable_dev(device_t dev)
+{
+	pnp_enable_devices(dev, &ops, ARRAY_SIZE(pnp_dev_info), pnp_dev_info);
+}
+
+struct chip_operations superio_ite_it8728f_ops = {
+	CHIP_NAME("ITE IT8728F Super I/O")
+	.enable_dev = enable_dev
+};



More information about the coreboot-gerrit mailing list