[coreboot-gerrit] Patch set updated for coreboot: 575a196 baytrail: fix nvs offsets
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Thu May 8 17:06:37 CEST 2014
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/4996
-gerrit
commit 575a196a424abe80cbc7e1c382e3e9faff80719f
Author: Aaron Durbin <adurbin at chromium.org>
Date: Mon Dec 9 15:03:34 2013 -0800
baytrail: fix nvs offsets
The VDAT data was off by 2 bytes when reading it from the
kernel. The reason is that the header did not line up
correctly with actual ACPI code.
BUG=chrome-os-partner:24440
BRANCH=None
TEST=crossystem devsw_cur now returns either 0 or 1 depending
on state.
Change-Id: Ie78599f29cd5daf7da98db5e37fa276d24339f6a
Signed-off-by: Aaron durbin <adurbin at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/179372
---
src/soc/intel/baytrail/baytrail/nvs.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/soc/intel/baytrail/baytrail/nvs.h b/src/soc/intel/baytrail/baytrail/nvs.h
index aed0974..97b5fc5 100644
--- a/src/soc/intel/baytrail/baytrail/nvs.h
+++ b/src/soc/intel/baytrail/baytrail/nvs.h
@@ -50,12 +50,12 @@ typedef struct {
u32 cmem; /* 0x30 - CBMEM TOC */
u32 tolm; /* 0x34 - Top of Low Memory */
u32 cbmc; /* 0x38 - coreboot memconsole */
- u8 rsvd5[39];
+ u8 rsvd5[36];
/* Serial IO device BARs */
u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */
u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */
- u8 rsvd6[95];
+ u8 rsvd6[96];
/* ChromeOS specific (starts at 0x100)*/
chromeos_acpi_t chromeos;
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