[coreboot-gerrit] Patch set updated for coreboot: 9981eb9 baytrail: Updates for DPTF ACPI framework

Aaron Durbin (adurbin@google.com) gerrit at coreboot.org
Tue May 13 16:29:13 CEST 2014


Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5028

-gerrit

commit 9981eb994df887b6e63c77e5456049ac08d8fe85
Author: Duncan Laurie <dlaurie at chromium.org>
Date:   Mon Jan 6 12:33:59 2014 -0800

    baytrail: Updates for DPTF ACPI framework
    
    - Remove some unused functions from CPU participant that were
    confusing the userland component since the CPU does not have
    an ACPI managed sensor.
    
    - Guard the charger participant with an ifdef so it can be
    left out if not supported.
    
    - Use the EC methods for setting auxiliary trip points and for
    handling the event when those trip points are crossed.
    
    - Add _NTT _DTI _SCP methods for thermal sensors.  I'm not
    clear if these are required or not but they seem to be expected
    by the other DPTF framework components.
    
    BUG=chrome-os-partner:17279
    BRANCH=rambi
    TEST=build and boot on rambi and load ESIF framework
    
    Change-Id: I3c9d92d5c52e5a7ec890a377e65ebf118cdd7087
    Signed-off-by: Duncan Laurie <dlaurie at chromium.org>
    Reviewed-on: https://chromium-review.googlesource.com/181662
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/soc/intel/baytrail/acpi/dptf/cpu.asl     |  54 -----------
 src/soc/intel/baytrail/acpi/dptf/dptf.asl    |  16 +++-
 src/soc/intel/baytrail/acpi/dptf/thermal.asl | 134 +++++++++++++++++++++++++++
 3 files changed, 146 insertions(+), 58 deletions(-)

diff --git a/src/soc/intel/baytrail/acpi/dptf/cpu.asl b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
index 6e6c792..f82c348 100644
--- a/src/soc/intel/baytrail/acpi/dptf/cpu.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/cpu.asl
@@ -9,7 +9,6 @@ Device (TCPU)
 {
 	Name (_HID, EISAID ("INT3401"))
 	Name (_UID, 0)
-	Name (CTYP, 0) /* Passive Cooling by default */
 
 	Method (_STA)
 	{
@@ -124,57 +123,4 @@ Device (TCPU)
 			Return (0)
 		}
 	}
-
-	/*
-	 * DPTF
-	 */
-
-	/* Convert from Degrees C to 1/10 Kelvin for ACPI */
-	Method (CTOK, 1) {
-		/* 10th of Degrees C */
-		Multiply (Arg0, 10, Local0)
-
-		/* Convert to Kelvin */
-		Add (Local0, 2732, Local0)
-
-		Return (Local0)
-	}
-
-	/* Critical temperature from NVS */
-	Method (_CRT, 0, Serialized)
-	{
-		Return (CTOK (\TCRT))
-	}
-
-	/* Hot temperature is 3 less than critical temperature */
-	Method (_HOT, 0, Serialized)
-	{
-		Return (CTOK (Subtract (\TCRT, 3)))
-	}
-
-	Method (_PSV, 0, Serialized)
-	{
-		If (CTYP) {
-			Return (CTOK (\TACT))
-		} Else {
-			Return (CTOK (\TPSV))
-		}
-	}
-
-	/* Set Cooling Policy
-	 *   Arg0 - Cooling policy mode, 1=active, 0=passive
-	 *   Arg1 - Acoustic Limit
-	 *   Arg2 - Power Limit
-	 */
-	Method (_SCP, 3, Serialized)
-	{
-		If (LEqual (Arg0, 0)) {
-			Store (0, CTYP)
-		} Else {
-			Store (1, CTYP)
-		}
-
-		/* DPTF Thermal Trip Points Changed Event */
-		Notify (TCPU, 0x91)
-	}
 }
diff --git a/src/soc/intel/baytrail/acpi/dptf/dptf.asl b/src/soc/intel/baytrail/acpi/dptf/dptf.asl
index b636886..6aebddc 100644
--- a/src/soc/intel/baytrail/acpi/dptf/dptf.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/dptf.asl
@@ -8,7 +8,7 @@ Device (DPTF)
 		/* DPPM Passive Policy 1.0 */
 		ToUUID("42A441D6-AE6A-462B-A84B-4A8CE79027D3"),
 
-		/*  DPPM Critical Policy */
+		/* DPPM Critical Policy */
 		ToUUID("97C68AE7-15FA-499c-B8C9-5DA81D606E0A"),
 
 		/* DPPM Cooling Policy */
@@ -35,9 +35,15 @@ Device (DPTF)
 		Return (\_SB.DTRT)
 	}
 
-	/* Thermal Threshold Event Handler */
-	Method (TEVT, 0, Serialized)
-	{
+	/* Convert from Degrees C to 1/10 Kelvin for ACPI */
+	Method (CTOK, 1) {
+		/* 10th of Degrees C */
+		Multiply (Arg0, 10, Local0)
+
+		/* Convert to Kelvin */
+		Add (Local0, 2732, Local0)
+
+		Return (Local0)
 	}
 
 	/* Include CPU Participant */
@@ -46,6 +52,8 @@ Device (DPTF)
 	/* Include Thermal Participants */
 	#include "thermal.asl"
 
+#ifdef DPTF_ENABLE_CHARGER
 	/* Include Charger Participant */
 	#include "charger.asl"
+#endif
 }
diff --git a/src/soc/intel/baytrail/acpi/dptf/thermal.asl b/src/soc/intel/baytrail/acpi/dptf/thermal.asl
index 2a77e6a..33ec207 100644
--- a/src/soc/intel/baytrail/acpi/dptf/thermal.asl
+++ b/src/soc/intel/baytrail/acpi/dptf/thermal.asl
@@ -1,3 +1,20 @@
+/* Thermal Threshold Event Handler */
+Method (TEVT, 1, Serialized)
+{
+	Switch (ToInteger (Arg0))
+	{
+#ifdef DPTF_TSR0_SENSOR_ID
+		Case (DPTF_TSR0_SENSOR_ID) { Notify (^TSR0, 0x90) }
+#endif
+#ifdef DPTF_TSR1_SENSOR_ID
+		Case (DPTF_TSR1_SENSOR_ID) { Notify (^TSR1, 0x90) }
+#endif
+#ifdef DPTF_TSR2_SENSOR_ID
+		Case (DPTF_TSR2_SENSOR_ID) { Notify (^TSR2, 0x90) }
+#endif
+	}
+}
+
 #ifdef DPTF_TSR0_SENSOR_ID
 Device (TSR0)
 {
@@ -6,6 +23,10 @@ Device (TSR0)
 	Name (PTYP, 0x03)
 	Name (TMPI, DPTF_TSR0_SENSOR_ID)
 	Name (_STR, Unicode (DPTF_TSR0_SENSOR_NAME))
+	Name (GTSH, 20) /* 2 degree hysteresis */
+	Name (NTTH, 5)  /* 5 degree notification threshold */
+	Name (LTM0, 0)  /* Last recorded temperature */
+	Name (CTYP, 0)  /* Cooling policy */
 
 	Method (_STA)
 	{
@@ -21,6 +42,41 @@ Device (TSR0)
 		Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
 	}
 
+	Method (_PSV)
+	{
+		Return (^^CTOK (DPTF_TSR0_PASSIVE))
+	}
+
+	/* Set Cooling Policy
+	 *   Arg0 - Cooling policy mode, 1=active, 0=passive
+	 *   Arg1 - Acoustic Limit
+	 *   Arg2 - Power Limit
+	 */
+	Method (_SCP, 3, Serialized)
+	{
+		If (LEqual (Arg0, 0)) {
+			Store (0, CTYP)
+		} Else {
+			Store (1, CTYP)
+		}
+
+		/* DPTF Thermal Trip Points Changed Event */
+		Notify (TSR0, 0x91)
+	}
+
+	/* Device Temperature Indication */
+	Method (_DTI, 1)
+	{
+		Store (Arg0, LTM0)
+		Notify (TSR0, 0x91)
+	}
+
+	/* Notification Temperature Threshold */
+	Method (_NTT)
+	{
+		Return (^^CTOK (NTTH))
+	}
+
 	Name (PATC, 2)
 
 	/* Set Aux Trip Point */
@@ -45,6 +101,10 @@ Device (TSR1)
 	Name (PTYP, 0x03)
 	Name (TMPI, DPTF_TSR1_SENSOR_ID)
 	Name (_STR, Unicode (DPTF_TSR1_SENSOR_NAME))
+	Name (GTSH, 20) /* 2 degree hysteresis */
+	Name (NTTH, 5)  /* 5 degree notification threshold */
+	Name (LTM1, 0)
+	Name (CTYP, 0)  /* Cooling policy */
 
 	Method (_STA)
 	{
@@ -60,6 +120,41 @@ Device (TSR1)
 		Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
 	}
 
+	Method (_PSV)
+	{
+		Return (^^CTOK (DPTF_TSR1_PASSIVE))
+	}
+
+	/* Set Cooling Policy
+	 *   Arg0 - Cooling policy mode, 1=active, 0=passive
+	 *   Arg1 - Acoustic Limit
+	 *   Arg2 - Power Limit
+	 */
+	Method (_SCP, 3, Serialized)
+	{
+		If (LEqual (Arg0, 0)) {
+			Store (0, CTYP)
+		} Else {
+			Store (1, CTYP)
+		}
+
+		/* DPTF Thermal Trip Points Changed Event */
+		Notify (TSR1, 0x91)
+	}
+
+	/* Device Temperature Indication */
+	Method (_DTI, 1)
+	{
+		Store (Arg0, LTM1)
+		Notify (TSR1, 0x91)
+	}
+
+	/* Notification Temperature Threshold */
+	Method (_NTT)
+	{
+		Return (^^CTOK (NTTH))
+	}
+
 	Name (PATC, 2)
 
 	/* Set Aux Trip Point */
@@ -84,6 +179,10 @@ Device (TSR2)
 	Name (PTYP, 0x03)
 	Name (TMPI, DPTF_TSR2_SENSOR_ID)
 	Name (_STR, Unicode (DPTF_TSR2_SENSOR_NAME))
+	Name (GTSH, 20) /* 2 degree hysteresis */
+	Name (NTTH, 5)  /* 5 degree notification threshold */
+	Name (LTM2, 0)
+	Name (CTYP, 0)  /* Cooling policy */
 
 	Method (_STA)
 	{
@@ -99,6 +198,41 @@ Device (TSR2)
 		Return (\_SB.PCI0.LPCB.EC0.TSRD (TMPI))
 	}
 
+	Method (_PSV)
+	{
+		Return (^^CTOK (DPTF_TSR2_PASSIVE))
+	}
+
+	/* Set Cooling Policy
+	 *   Arg0 - Cooling policy mode, 1=active, 0=passive
+	 *   Arg1 - Acoustic Limit
+	 *   Arg2 - Power Limit
+	 */
+	Method (_SCP, 3, Serialized)
+	{
+		If (LEqual (Arg0, 0)) {
+			Store (0, CTYP)
+		} Else {
+			Store (1, CTYP)
+		}
+
+		/* DPTF Thermal Trip Points Changed Event */
+		Notify (TSR2, 0x91)
+	}
+
+	/* Device Temperature Indication */
+	Method (_DTI, 1)
+	{
+		Store (Arg0, LTM2)
+		Notify (TSR2, 0x91)
+	}
+
+	/* Notification Temperature Threshold */
+	Method (_NTT)
+	{
+		Return (^^CTOK (NTTH))
+	}
+
 	Name (PATC, 2)
 
 	/* Set Aux Trip Point */



More information about the coreboot-gerrit mailing list