[coreboot-gerrit] Patch set updated for coreboot: 37ca186 baytrail: enable graphics turbo
Aaron Durbin (adurbin@google.com)
gerrit at coreboot.org
Wed May 14 15:57:27 CEST 2014
Aaron Durbin (adurbin at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5050
-gerrit
commit 37ca1861cad66aa399b1c667f282390cbd915e7a
Author: Aaron Durbin <adurbin at chromium.org>
Date: Wed Jan 15 11:59:10 2014 -0600
baytrail: enable graphics turbo
Though the limited documentation indicates the default is
0 for the gfx_turbo_disable bit, in practice that isn't
true. Knock down the gfs_turbo_disable bit to enable
graphics turbo mode.
BUG=chrome-os-partner:25044
BRANCH=baytrail
TEST=Built and booted. Added debug code to output SB_BIOS_CONFIG.
Noted that bit 7 was set to 0.
Change-Id: I11210c6a0b29765cb709a54d6ebd94211538807b
Signed-off-by: Aaron Durbin <adurbin at chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/182640
Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
src/soc/intel/baytrail/gfx.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/src/soc/intel/baytrail/gfx.c b/src/soc/intel/baytrail/gfx.c
index 6f78dac..4ed08c9 100644
--- a/src/soc/intel/baytrail/gfx.c
+++ b/src/soc/intel/baytrail/gfx.c
@@ -212,6 +212,10 @@ static const struct reg_script gfx_init_script[] = {
REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x9404, 0),
REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x9408, 0),
REG_RES_WRITE32(PCI_BASE_ADDRESS_0, 0x940c, 0),
+
+ /* Enable Gfx Turbo. */
+ REG_IOSF_RMW(IOSF_PORT_PMC, SB_BIOS_CONFIG,
+ ~SB_BIOS_CONFIG_GFX_TURBO_DIS, 0),
REG_SCRIPT_END
};
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