[coreboot-gerrit] Patch set updated for coreboot: 0e39cce amd/agesa: Implicit assigment between enum without cast
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Sun May 18 08:12:34 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5760
-gerrit
commit 0e39cce9357d0717acbc38c767d18b6072ea8721
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Thu May 15 21:23:51 2014 +1000
amd/agesa: Implicit assigment between enum without cast
Change-Id: I31632948ce69b2d1ff63b6c920016ed6fdf9e2f8
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c
index 613aadd..9ff66f2 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/NB/mnmct.c
@@ -186,7 +186,7 @@ MemNSyncTargetSpeedNb (
ASSERT ((NBPtr->ChannelPtr->TechType == DDR3_TECHNOLOGY) ?
((MEMORY_BUS_SPEED)(ChnlTmgMod[1]) >= DDR667_FREQUENCY) :
((MEMORY_BUS_SPEED)(ChnlTmgMod[1]) <= DDR1066_FREQUENCY));
- MemClkFreq = ChnlTmgMod[1];
+ MemClkFreq = (MEMORY_BUS_SPEED) ChnlTmgMod[1];
}
}
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