[coreboot-gerrit] New patch to review for coreboot: 38cccf0 drivers/intel/fsp: update enable_mrc_cache with fast boot
Martin Roth (martin.roth@se-eng.com)
gerrit at coreboot.org
Mon May 19 23:30:21 CEST 2014
Martin Roth (martin.roth at se-eng.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5794
-gerrit
commit 38cccf03aafcf3c59c2d78dcb4b7b89aeee073c3
Author: Martin Roth <gaumless at gmail.com>
Date: Mon May 19 15:30:00 2014 -0600
drivers/intel/fsp: update enable_mrc_cache with fast boot
When going from a configuration with fast boot disabled to one with
it enabled, ENABLE_MRC_CACHE was not being enabled properly. This
forces it on with ENABLE_FSP_FAST_BOOT.
Change-Id: If7b6374e0c0a1d5403a50a1b0a958cea6f96cc88
Signed-off-by: Martin Roth <gaumless at gmail.com>
---
src/drivers/intel/fsp/Kconfig | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/src/drivers/intel/fsp/Kconfig b/src/drivers/intel/fsp/Kconfig
index 3e16266..bde7312 100644
--- a/src/drivers/intel/fsp/Kconfig
+++ b/src/drivers/intel/fsp/Kconfig
@@ -30,6 +30,10 @@ config HAVE_FSP_BIN
Note: Without this binary, coreboot builds relying on the FSP
will not boot
+config FSP_SPECIFIC_OPTIONS
+ def_bool y
+ select ENABLE_MRC_CACHE if ENABLE_FSP_FAST_BOOT
+
config DCACHE_RAM_BASE
hex
default 0xfef00000
@@ -62,7 +66,7 @@ config ENABLE_FSP_FAST_BOOT
config ENABLE_MRC_CACHE
bool
- default ENABLE_FSP_FAST_BOOT
+ default n
help
Enabling this feature will cause MRC data to be cached in NV storage.
This can either be used for fast boot, or just because the FSP wants
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