[coreboot-gerrit] New patch to review for coreboot: 3002b40 amd/agesa/f14: Backport f15tn fixes from DDR3 in mtspd3.c
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Wed May 21 22:22:55 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5802
-gerrit
commit 3002b400c6665b5d90b4b9313ad1bfad459826c7
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Thu May 22 06:16:15 2014 +1000
amd/agesa/f14: Backport f15tn fixes from DDR3 in mtspd3.c
Change-Id: I710efc3171e1653241f2dba1217a9560d2d99a16
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c b/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c
index c2f9372..dc09038 100644
--- a/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c
+++ b/src/vendorcode/amd/agesa/f14/Proc/Mem/Tech/DDR3/mtspd3.c
@@ -290,7 +290,7 @@ MemTDIMMPresence3 (
// as a QR RDIMM with a rank Mux of x1 and therefore all four CS will be used. So an 8R LRDIMM will
// be marked as a QR even if Rank multiplication allows it to use only 2 logical ranks.
//
- if (ChannelPtr->LrDimmPresent |= DimmMask) {
+ if ((ChannelPtr->LrDimmPresent & DimmMask) != 0) {
//
// LRDIMM Physical Ranks
//
@@ -320,7 +320,7 @@ MemTDIMMPresence3 (
//
// Double Addr bus load value for dual rank DIMMs (Unless LRDIMM)
//
- if ( ((ChannelPtr->LrDimmPresent |= DimmMask) == 0) && (Value8 == 2) ) {
+ if (((ChannelPtr->LrDimmPresent & DimmMask) == 0) && (Value8 == 2) ) {
Devwidth = Devwidth << 1;
}
//
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