[coreboot-gerrit] Patch set updated for coreboot: bed345d northbridge/amd/amdmct: Remove superfluous parenthesis in if-statements
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Thu May 22 23:01:21 CEST 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5817
-gerrit
commit bed345d2daf6b9c37a3ae11e9c3cb375eae09259
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Fri May 23 05:58:27 2014 +1000
northbridge/amd/amdmct: Remove superfluous parenthesis in if-statements
Spotted by Clang
Change-Id: I98d2bf6b408caf320c5bcc8adb23d621b182976b
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/northbridge/amd/amdmct/mct/mct_d.c | 10 +++++-----
src/northbridge/amd/amdmct/mct_ddr3/mct_d.c | 2 +-
src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c | 2 +-
3 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/src/northbridge/amd/amdmct/mct/mct_d.c b/src/northbridge/amd/amdmct/mct/mct_d.c
index 47b89b4..66eb88a 100644
--- a/src/northbridge/amd/amdmct/mct/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct/mct_d.c
@@ -1532,27 +1532,27 @@ static u8 AutoConfig_D(struct MCTStatStruc *pMCTstat,
DramConfigLo |= 1 << 4; /* 75 Ohms ODT */
if (mctGet_NVbits(NV_MAX_DIMMS) == 8) {
if (pDCTstat->Speed == 3) {
- if ((pDCTstat->MAdimms[dct] == 4))
+ if (pDCTstat->MAdimms[dct] == 4)
DramConfigLo |= 1 << 5; /* 50 Ohms ODT */
} else if (pDCTstat->Speed == 4){
- if ((pDCTstat->MAdimms[dct] != 1))
+ if (pDCTstat->MAdimms[dct] != 1)
DramConfigLo |= 1 << 5; /* 50 Ohms ODT */
}
} else {
// FIXME: Skip for Ax versions
- if ((pDCTstat->MAdimms[dct] == 4)) {
+ if (pDCTstat->MAdimms[dct] == 4) {
if ( pDCTstat->DimmQRPresent != 0) {
if ((pDCTstat->Speed == 3) || (pDCTstat->Speed == 4)) {
DramConfigLo |= 1 << 5; /* 50 Ohms ODT */
}
- } else if ((pDCTstat->MAdimms[dct] == 4)) {
+ } else if (pDCTstat->MAdimms[dct] == 4) {
if (pDCTstat->Speed == 4) {
if ( pDCTstat->DimmQRPresent != 0) {
DramConfigLo |= 1 << 5; /* 50 Ohms ODT */
}
}
}
- } else if ((pDCTstat->MAdimms[dct] == 2)) {
+ } else if (pDCTstat->MAdimms[dct] == 2) {
DramConfigLo |= 1 << 5; /* 50 Ohms ODT */
}
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
index 7db13d2..90b7ed3 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mct_d.c
@@ -3380,7 +3380,7 @@ static void mct_BeforeDramInit_Prod_D(struct MCTStatStruc *pMCTstat,
u32 dev = pDCTstat->dev_dct;
if (pDCTstat->LogicalCPUID & AMD_DR_Dx) {
- if ((pDCTstat->Speed == 3))
+ if (pDCTstat->Speed == 3)
dword = 0x00000800;
else
dword = 0x00000000;
diff --git a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
index aba558f..1446f4f 100644
--- a/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
+++ b/src/northbridge/amd/amdmct/mct_ddr3/mhwlc_d.c
@@ -502,7 +502,7 @@ void prepareDimms(sMCTStruct *pMCTData, sDCTStruct *pDCTData, u8 dimm, BOOL wl)
}
}
else { /* 1 or 4 Dimms per channel */
- if ((pDCTData->MaxDimmsInstalled == 4))
+ if (pDCTData->MaxDimmsInstalled == 4)
{
tempW1 = 0x04; /* Rtt_Nom=RZQ/4=60 Ohm */
}
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