[coreboot-gerrit] New patch to review for coreboot: 235a93f Lenovo X60: Native VGA init: Unbreak it.

Denis Carikli (GNUtoo@no-log.org) gerrit at coreboot.org
Sun May 25 11:15:57 CEST 2014


Denis Carikli (GNUtoo at no-log.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/5861

-gerrit

commit 235a93f34e10a7d51406cffc22e2c303a2139b07
Author: Peter Stuge <peter at stuge.se>
Date:   Sun Oct 27 16:07:28 2013 +0100

    Lenovo X60: Native VGA init: Unbreak it.
    
    Without that fix the GTT pointed at 0x00000000,
      that created some screen corruptions and other bigger boot issues.
    
    Before, the GTT size was also too small.
    
    This patch is made from Peter Stuge's modifications, I just split it
      and squashed it and added a commit message.
    
    Change-Id: I023fc955056fe0207778d71e10eaeab95f78bd28
    Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo at no-log.org>
---
 src/mainboard/lenovo/x60/i915.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/lenovo/x60/i915.c b/src/mainboard/lenovo/x60/i915.c
index bc0f00b..bbfc062 100644
--- a/src/mainboard/lenovo/x60/i915.c
+++ b/src/mainboard/lenovo/x60/i915.c
@@ -138,7 +138,8 @@ static int gtt_setup(unsigned int mmiobase)
 	PGETBL_save = read32(mmiobase + PGETBL_CTL) & ~PGETBL_ENABLED;
 	PGETBL_save |= PGETBL_ENABLED;
 
-	printk(BIOS_DEBUG, "PGETBL_save=0x%lx\n", PGETBL_save);
+	PGETBL_save |= pci_read_config32(dev_find_slot(0, PCI_DEVFN(2,0)), 0x5c) & 0xfffff000;
+	PGETBL_save |= 2; /* set GTT to 256kb */
 
 	write32(mmiobase + GFX_FLSH_CNTL, 0);
 
@@ -378,7 +379,7 @@ int i915lightup(unsigned int pphysbase, unsigned int piobase,
 		return 0;
 	}
 
-	setgtt(0, 800 , physbase, 4096);
+	setgtt(0, 1024, physbase, 4096);
 
 	temp = READ32(PGETLB_CTL);
 	printk(BIOS_INFO, "GTT PGETLB_CTL register: 0x%lx\n", temp);



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