[coreboot-gerrit] New patch to review for coreboot: a3d7fc2 mainboard/supermicro/x6d{ai_g, he_g, he_g2, hr_ig, hr_ig2}: EOL
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Wed Nov 5 02:54:18 CET 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7336
-gerrit
commit a3d7fc248bb5a06419bdf72a5daa126aedc8a96f
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Wed Nov 5 12:53:12 2014 +1100
mainboard/supermicro/x6d{ai_g,he_g,he_g2,hr_ig,hr_ig2}: EOL
Kill off old boards.
Change-Id: I0f70deb27fe862afcc5d1fd3b9f2cc0ae8a87c68
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/mainboard/supermicro/Kconfig | 15 -
src/mainboard/supermicro/x6dai_g/Kconfig | 32 ---
src/mainboard/supermicro/x6dai_g/board_info.txt | 2 -
src/mainboard/supermicro/x6dai_g/cmos.layout | 78 -----
src/mainboard/supermicro/x6dai_g/debug.c | 328 ----------------------
src/mainboard/supermicro/x6dai_g/devicetree.cb | 65 -----
src/mainboard/supermicro/x6dai_g/irq_tables.c | 39 ---
src/mainboard/supermicro/x6dai_g/mptable.c | 88 ------
src/mainboard/supermicro/x6dai_g/romstage.c | 98 -------
src/mainboard/supermicro/x6dai_g/watchdog.c | 41 ---
src/mainboard/supermicro/x6dhe_g/Kconfig | 33 ---
src/mainboard/supermicro/x6dhe_g/board_info.txt | 2 -
src/mainboard/supermicro/x6dhe_g/cmos.layout | 78 -----
src/mainboard/supermicro/x6dhe_g/debug.c | 328 ----------------------
src/mainboard/supermicro/x6dhe_g/devicetree.cb | 81 ------
src/mainboard/supermicro/x6dhe_g/irq_tables.c | 39 ---
src/mainboard/supermicro/x6dhe_g/mptable.c | 132 ---------
src/mainboard/supermicro/x6dhe_g/romstage.c | 105 -------
src/mainboard/supermicro/x6dhe_g/watchdog.c | 98 -------
src/mainboard/supermicro/x6dhe_g2/Kconfig | 33 ---
src/mainboard/supermicro/x6dhe_g2/board_info.txt | 2 -
src/mainboard/supermicro/x6dhe_g2/cmos.layout | 78 -----
src/mainboard/supermicro/x6dhe_g2/debug.c | 328 ----------------------
src/mainboard/supermicro/x6dhe_g2/devicetree.cb | 81 ------
src/mainboard/supermicro/x6dhe_g2/irq_tables.c | 39 ---
src/mainboard/supermicro/x6dhe_g2/mptable.c | 133 ---------
src/mainboard/supermicro/x6dhe_g2/romstage.c | 107 -------
src/mainboard/supermicro/x6dhe_g2/watchdog.c | 98 -------
src/mainboard/supermicro/x6dhr_ig/Kconfig | 33 ---
src/mainboard/supermicro/x6dhr_ig/board_info.txt | 2 -
src/mainboard/supermicro/x6dhr_ig/cmos.layout | 78 -----
src/mainboard/supermicro/x6dhr_ig/debug.c | 328 ----------------------
src/mainboard/supermicro/x6dhr_ig/devicetree.cb | 85 ------
src/mainboard/supermicro/x6dhr_ig/irq_tables.c | 39 ---
src/mainboard/supermicro/x6dhr_ig/mptable.c | 180 ------------
src/mainboard/supermicro/x6dhr_ig/romstage.c | 106 -------
src/mainboard/supermicro/x6dhr_ig/watchdog.c | 98 -------
src/mainboard/supermicro/x6dhr_ig2/Kconfig | 33 ---
src/mainboard/supermicro/x6dhr_ig2/board_info.txt | 2 -
src/mainboard/supermicro/x6dhr_ig2/cmos.layout | 78 -----
src/mainboard/supermicro/x6dhr_ig2/debug.c | 328 ----------------------
src/mainboard/supermicro/x6dhr_ig2/devicetree.cb | 76 -----
src/mainboard/supermicro/x6dhr_ig2/irq_tables.c | 39 ---
src/mainboard/supermicro/x6dhr_ig2/mptable.c | 168 -----------
src/mainboard/supermicro/x6dhr_ig2/romstage.c | 104 -------
src/mainboard/supermicro/x6dhr_ig2/watchdog.c | 98 -------
46 files changed, 4456 deletions(-)
diff --git a/src/mainboard/supermicro/Kconfig b/src/mainboard/supermicro/Kconfig
index ef4d3bc..aaa16b3 100644
--- a/src/mainboard/supermicro/Kconfig
+++ b/src/mainboard/supermicro/Kconfig
@@ -17,16 +17,6 @@ config BOARD_SUPERMICRO_H8SCM
bool "H8SCM"
config BOARD_SUPERMICRO_H8QGI
bool "H8QGI"
-config BOARD_SUPERMICRO_X6DAI_G
- bool "X6DAi-G"
-config BOARD_SUPERMICRO_X6DHE_G2
- bool "X6DHE-G2"
-config BOARD_SUPERMICRO_X6DHE_G
- bool "X6DHE-G"
-config BOARD_SUPERMICRO_X6DHR_IG2
- bool "X6DHR-iG2"
-config BOARD_SUPERMICRO_X6DHR_IG
- bool "X6DHR-iG"
config BOARD_SUPERMICRO_X7DB8
bool "X7DB8 / X7DB8+"
@@ -39,11 +29,6 @@ source "src/mainboard/supermicro/h8qme_fam10/Kconfig"
source "src/mainboard/supermicro/h8scm_fam10/Kconfig"
source "src/mainboard/supermicro/h8scm/Kconfig"
source "src/mainboard/supermicro/h8qgi/Kconfig"
-source "src/mainboard/supermicro/x6dai_g/Kconfig"
-source "src/mainboard/supermicro/x6dhe_g2/Kconfig"
-source "src/mainboard/supermicro/x6dhe_g/Kconfig"
-source "src/mainboard/supermicro/x6dhr_ig2/Kconfig"
-source "src/mainboard/supermicro/x6dhr_ig/Kconfig"
source "src/mainboard/supermicro/x7db8/Kconfig"
config MAINBOARD_VENDOR
diff --git a/src/mainboard/supermicro/x6dai_g/Kconfig b/src/mainboard/supermicro/x6dai_g/Kconfig
deleted file mode 100644
index 4999320..0000000
--- a/src/mainboard/supermicro/x6dai_g/Kconfig
+++ /dev/null
@@ -1,32 +0,0 @@
-if BOARD_SUPERMICRO_X6DAI_G
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_INTEL_SOCKET_MPGA604
- select NORTHBRIDGE_INTEL_E7525
- select SOUTHBRIDGE_INTEL_ESB6300
- select SUPERIO_WINBOND_W83627HF
- select ROMCC
- select HAVE_HARD_RESET
- select HAVE_OPTION_TABLE
- select HAVE_PIRQ_TABLE
- select HAVE_MP_TABLE
- select BOARD_ROMSIZE_KB_1024
-
-config MAINBOARD_DIR
- string
- default supermicro/x6dai_g
-
-config MAINBOARD_PART_NUMBER
- string
- default "X6DAi-G"
-
-config MAX_CPUS
- int
- default 4
-
-config IRQ_SLOT_COUNT
- int
- default 15
-
-endif # BOARD_SUPERMICRO_X6DAI_G
diff --git a/src/mainboard/supermicro/x6dai_g/board_info.txt b/src/mainboard/supermicro/x6dai_g/board_info.txt
deleted file mode 100644
index 5d4f089..0000000
--- a/src/mainboard/supermicro/x6dai_g/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: server
-Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7525/X6DAi-G.cfm
diff --git a/src/mainboard/supermicro/x6dai_g/cmos.layout b/src/mainboard/supermicro/x6dai_g/cmos.layout
deleted file mode 100644
index 635555e..0000000
--- a/src/mainboard/supermicro/x6dai_g/cmos.layout
+++ /dev/null
@@ -1,78 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-395 1 e 2 hyper_threading
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/supermicro/x6dai_g/debug.c b/src/mainboard/supermicro/x6dai_g/debug.c
deleted file mode 100644
index 93199d7..0000000
--- a/src/mainboard/supermicro/x6dai_g/debug.c
+++ /dev/null
@@ -1,328 +0,0 @@
-#include <spd.h>
-
-static void print_reg(unsigned char index)
-{
- unsigned char data;
-
- outb(index, 0x2e);
- data = inb(0x2f);
- print_debug("0x");
- print_debug_hex8(index);
- print_debug(": 0x");
- print_debug_hex8(data);
- print_debug("\n");
- return;
-}
-
-static void xbus_en(void)
-{
- /* select the XBUS function in the SIO */
- outb(0x07, 0x2e);
- outb(0x0f, 0x2f);
- outb(0x30, 0x2e);
- outb(0x01, 0x2f);
- return;
-}
-
-static void setup_func(unsigned char func)
-{
- /* select the function in the SIO */
- outb(0x07, 0x2e);
- outb(func, 0x2f);
- /* print out the regs */
- print_reg(0x30);
- print_reg(0x60);
- print_reg(0x61);
- print_reg(0x62);
- print_reg(0x63);
- print_reg(0x70);
- print_reg(0x71);
- print_reg(0x74);
- print_reg(0x75);
- return;
-}
-
-static void siodump(void)
-{
- int i;
- unsigned char data;
-
- print_debug("\n*** SERVER I/O REGISTERS ***\n");
- for (i=0x10; i<=0x2d; i++) {
- print_reg((unsigned char)i);
- }
-#if 0
- print_debug("\n*** XBUS REGISTERS ***\n");
- setup_func(0x0f);
- for (i=0xf0; i<=0xff; i++) {
- print_reg((unsigned char)i);
- }
-
- print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n");
- setup_func(0x03);
- print_reg(0xf0);
-
- print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n");
- setup_func(0x02);
- print_reg(0xf0);
-
-#endif
- print_debug("\n*** GPIO REGISTERS ***\n");
- setup_func(0x07);
- for (i=0xf0; i<=0xf8; i++) {
- print_reg((unsigned char)i);
- }
- print_debug("\n*** GPIO VALUES ***\n");
- data = inb(0x68a);
- print_debug("\nGPDO 4: 0x");
- print_debug_hex8(data);
- data = inb(0x68b);
- print_debug("\nGPDI 4: 0x");
- print_debug_hex8(data);
- print_debug("\n");
-
-#if 0
-
- print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n");
- setup_func(0x0a);
- print_reg(0xf0);
-
- print_debug("\n*** FAN CONTROL REGISTERS ***\n");
- setup_func(0x09);
- print_reg(0xf0);
- print_reg(0xf1);
-
- print_debug("\n*** RTC REGISTERS ***\n");
- setup_func(0x10);
- print_reg(0xf0);
- print_reg(0xf1);
- print_reg(0xf3);
- print_reg(0xf6);
- print_reg(0xf7);
- print_reg(0xfe);
- print_reg(0xff);
-
- print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n");
- setup_func(0x14);
- print_reg(0xf0);
-#endif
- return;
-}
-
-static void print_debug_pci_dev(unsigned dev)
-{
- print_debug("PCI: ");
- print_debug_hex8((dev >> 16) & 0xff);
- print_debug_char(':');
- print_debug_hex8((dev >> 11) & 0x1f);
- print_debug_char('.');
- print_debug_hex8((dev >> 8) & 7);
-}
-
-static void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- print_debug_pci_dev(dev);
- print_debug("\n");
- }
-}
-
-static void dump_pci_device(unsigned dev)
-{
- int i;
- print_debug_pci_dev(dev);
- print_debug("\n");
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
- print_debug_char(' ');
- print_debug_hex8(val);
- if ((i & 0x0f) == 0x0f) {
- print_debug("\n");
- }
- }
-}
-
-static void dump_bar14(unsigned dev)
-{
- int i;
- unsigned long bar;
-
- print_debug("BAR 14 Dump\n");
-
- bar = pci_read_config32(dev, 0x14);
- for(i = 0; i <= 0x300; i+=4) {
-#if 0
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
-#endif
- if((i%4)==0) {
- print_debug("\n");
- print_debug_hex16(i);
- print_debug_char(' ');
- }
- print_debug_hex32(read32(bar + i));
- print_debug_char(' ');
- }
- print_debug("\n");
-}
-
-static void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
-#if 0
-static void dump_spd_registers(const struct mem_controller *ctrl)
-{
- int i;
- print_debug("\n");
- for(i = 0; i < 4; i++) {
- unsigned device;
- device = ctrl->channel0[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".0: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- device = ctrl->channel1[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".1: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- }
-}
-#endif
-
-void dump_spd_registers(void)
-{
- unsigned device;
- device = DIMM0;
- while(device <= DIMM7) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("dimm ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 256) ; i++) {
- unsigned char byte;
- if ((i % 16) == 0) {
- print_debug("\n");
- print_debug_hex8(i);
- print_debug(": ");
- }
- status = smbus_read_byte(device, i);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
-
-void dump_ipmi_registers(void)
-{
- unsigned device;
- device = 0x42;
- while(device <= 0x42) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("ipmi ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 8) ; i++) {
- unsigned char byte;
- status = smbus_read_byte(device, 2);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
diff --git a/src/mainboard/supermicro/x6dai_g/devicetree.cb b/src/mainboard/supermicro/x6dai_g/devicetree.cb
deleted file mode 100644
index 60508a3..0000000
--- a/src/mainboard/supermicro/x6dai_g/devicetree.cb
+++ /dev/null
@@ -1,65 +0,0 @@
-chip northbridge/intel/e7525 # mch
- device domain 0 on
- subsystemid 0x15d9 0x6780 inherit
- chip southbridge/intel/esb6300 # esb6300
- register "pirq_a_d" = "0x0b0a0a05"
- register "pirq_e_h" = "0x0a0b0c80"
-
- device pci 1c.0 on end
-
- device pci 1d.0 on end
- device pci 1d.1 on end
- device pci 1d.4 on end
- device pci 1d.5 on end
- device pci 1d.7 on end
-
- device pci 1e.0 on end
-
- device pci 1f.0 on
- chip superio/winbond/w83627hf
- device pnp 2e.0 off end
- device pnp 2e.1 off end
- device pnp 2e.2 on
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.4 off end
- device pnp 2e.5 off end
- device pnp 2e.6 off end
- device pnp 2e.7 off end
- device pnp 2e.9 off end
- device pnp 2e.a on end
- device pnp 2e.b off end
- device pnp 2e.f off end
- device pnp 2e.10 off end
- device pnp 2e.14 off end
- end
- end
- device pci 1f.1 on end
- device pci 1f.2 on end
- device pci 1f.3 on end
- device pci 1f.5 off end
- device pci 1f.6 on end
- end
- device pci 00.0 on end
- device pci 00.1 on end
- device pci 00.2 on end
- device pci 02.0 on end
- device pci 03.0 on end
- device pci 04.0 on end
- device pci 08.0 on end
- end
- device cpu_cluster 0 on
- chip cpu/intel/socket_mPGA604 # cpu0
- device lapic 0 on end
- end
- chip cpu/intel/socket_mPGA604 # cpu1
- device lapic 6 on end
- end
- end
-end
-
diff --git a/src/mainboard/supermicro/x6dai_g/irq_tables.c b/src/mainboard/supermicro/x6dai_g/irq_tables.c
deleted file mode 100644
index 9cdf027..0000000
--- a/src/mainboard/supermicro/x6dai_g/irq_tables.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/* PCI: Interrupt Routing Table found at 0x40163ed0 size = 272 */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- 0x52495024, /* u32 signature */
- 0x0100, /* u16 version */
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
- 0x00, /* u8 Bus 0 */
- 0xf8, /* u8 Device 1, Function 0 */
- 0x0000, /* u16 reserve IRQ for PCI */
- 0x8086, /* u16 Vendor */
- 0x122e, /* Device ID */
- 0x00000000, /* u32 miniport_data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0x78, /* u8 checksum - mod 256 checksum must give zero */
- { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, 0x00, {{0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0x00},
- {0x00, 0x10, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00},
- {0x01, 0x00, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}}, 0x04, 0x00},
- {0x00, 0x20, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00},
- {0x02, 0x00, {{0x60, 0x1ef8}, {0x61, 0x1ef8}, {0x62, 0x1ef8}, {0x63, 0x1ef8}}, 0x06, 0x00},
- {0x00, 0xe0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00},
- {0x04, 0x08, {{0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}}, 0x01, 0x00},
- {0x04, 0x10, {{0x6a, 0x1ef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x07, 0x00},
- {0x04, 0x18, {{0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}, {0x6a, 0x1ef8}}, 0x02, 0x00},
- {0x00, 0xf0, {{0x60, 0xdef8}, {0x61, 0xdef8}, {0x62, 0xdef8}, {0x63, 0xdef8}}, 0x00, 0x00},
- {0x05, 0x40, {{0x68, 0x1ef8}, {0x69, 0x1ef8}, {0x6a, 0x1ef8}, {0x6b, 0x1ef8}}, 0x03, 0x00},
- {0x05, 0x18, {{0x6a, 0x1ef8}, {0x00, 0xdef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x08, 0x00},
- {0x05, 0x10, {{0x69, 0x1ef8}, {0x6a, 0x1ef8}, {0x6b, 0x1ef8}, {0x68, 0x1ef8}}, 0x05, 0x00},
- {0x00, 0xf8, {{0x62, 0x1ef8}, {0x61, 0x1ef8}, {0x00, 0xdef8}, {0x00, 0xdef8}}, 0x00, 0x00},
- {0x00, 0xe8, {{0x60, 0x1ef8}, {0x63, 0x1ef8}, {0x00, 0xdef8}, {0x6b, 0x1ef8}}, 0x00, 0x00}
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/supermicro/x6dai_g/mptable.c b/src/mainboard/supermicro/x6dai_g/mptable.c
deleted file mode 100644
index 0efae77..0000000
--- a/src/mainboard/supermicro/x6dai_g/mptable.c
+++ /dev/null
@@ -1,88 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <arch/ioapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-
-static void *smp_write_config_table(void *v)
-{
- struct mp_config_table *mc;
- int bus_isa;
- unsigned char bus_6300;
-
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-
- mptable_init(mc, LOCAL_APIC_ADDR);
-
- smp_write_processors(mc);
-
- {
- device_t dev;
-
- /* southbridge */
- dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
- if (dev) {
- bus_6300 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
- bus_6300 = 5;
- }
- }
-
- mptable_write_buses(mc, NULL, &bus_isa);
-
- /* IOAPIC handling */
-
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
- smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
-
- mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
-
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x74, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x77, 0x02, 0x17);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x75, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7c, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7d, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7d, 0x02, 0x11);
- /* Slot 1 function 0 */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 4, 0x04, 0x03, 0x00);
- /* Slot 2 function 0 */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 4, 0x0c, 0x03, 0x01);
- /* Slot 3 function 0 */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_6300, 0x20, 0x02, 0x14);
- /* Slot 4 function 0 */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_6300, 0x08, 0x02, 0x15);
- /* On board NIC */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_6300, 0x0c, 0x02, 0x16);
-
- /* Standard local interrupt assignments */
-// smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
-// bus_isa, 0x00, MP_APIC_ALL, 0x00);
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x00, MP_APIC_ALL, 0x01);
-
- /* There is no extension information... */
-
- /* Compute the checksums */
- return mptable_finalize(mc);
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
- void *v;
- v = smp_write_floating_table(addr, 0);
- return (unsigned long)smp_write_config_table(v);
-}
diff --git a/src/mainboard/supermicro/x6dai_g/romstage.c b/src/mainboard/supermicro/x6dai_g/romstage.c
deleted file mode 100644
index 0385cad..0000000
--- a/src/mainboard/supermicro/x6dai_g/romstage.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include "drivers/pc80/udelay_io.c"
-#include "lib/delay.c"
-#include "southbridge/intel/esb6300/early_smbus.c"
-#include "northbridge/intel/e7525/raminit.h"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "debug.c"
-#include "watchdog.c"
-#include "southbridge/intel/esb6300/reset.c"
-#include "superio/winbond/w83627hf/early_serial.c"
-#include <superio/winbond/w83627hf/w83627hf.h>
-#include "northbridge/intel/e7525/memory_initialized.c"
-#include "cpu/x86/bist.h"
-#include <spd.h>
-
-#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2)
-#define DUMMY_DEV PNP_DEV(0x2e, 0)
-
-#define DEVPRES_CONFIG ( \
- DEVPRES_D1F0 | \
- DEVPRES_D2F0 | \
- DEVPRES_D3F0 | \
- DEVPRES_D4F0 | \
- DEVPRES_D6F0 | \
- 0 )
-#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/e7525/raminit.c"
-#include "lib/generic_sdram.c"
-#include "arch/x86/lib/stages.c"
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- static const struct mem_controller mch[] = {
- {
- .node_id = 0,
- .f0 = PCI_DEV(0, 0x00, 0),
- .f1 = PCI_DEV(0, 0x00, 1),
- .f2 = PCI_DEV(0, 0x00, 2),
- .f3 = PCI_DEV(0, 0x00, 3),
- .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
- .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
- }
- };
-
- if (bist == 0) {
- /* Skip this if there was a built in self test failure */
- early_mtrr_init();
- if (memory_initialized())
- skip_romstage();
- }
-
- w83627hf_set_clksel_48(DUMMY_DEV);
- w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
-
- /* MOVE ME TO A BETTER LOCATION !!! */
- /* config LPC decode for flash memory access */
- device_t dev;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID)
- die("Missing 6300ESB?");
- pci_write_config32(dev, 0xe8, 0x00000000);
- pci_write_config8(dev, 0xf0, 0x00);
-
-#if 0
- display_cpuid_update_microcode();
- print_pci_devices();
-#endif
-#if 1
- enable_smbus();
-#endif
-#if 0
- int i;
- for(i = 0; i < 1; i++)
- dump_spd_registers();
-#endif
- disable_watchdogs();
- sdram_initialize(ARRAY_SIZE(mch), mch);
-#if 1
- dump_pci_device(PCI_DEV(0, 0x00, 0));
-// dump_bar14(PCI_DEV(0, 0x00, 0));
-#endif
-}
diff --git a/src/mainboard/supermicro/x6dai_g/watchdog.c b/src/mainboard/supermicro/x6dai_g/watchdog.c
deleted file mode 100644
index 2fd3274..0000000
--- a/src/mainboard/supermicro/x6dai_g/watchdog.c
+++ /dev/null
@@ -1,41 +0,0 @@
-#include <device/pnp_def.h>
-
-#define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
-#define NSC_WDBASE 0x600
-#define ICH5_WDBASE 0x400
-#define ICH5_GPIOBASE 0x500
-
-static void disable_esb6300_watchdog(void)
-{
- /* FIXME move me somewhere more appropriate */
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing 6300ESB?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 10);
- pci_write_config16(dev, 0x04, value);
-
- /* Set and enable acpibase */
- pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
- pci_write_config8(dev, 0x44, 0x10);
- base = ICH5_WDBASE + 0x60;
-
- /* Set bit 11 in TCO1_CNT */
- value = inw(base + 0x08);
- value |= 1 << 11;
- outw(value, base + 0x08);
-
- /* Clear TCO timeout status */
- outw(0x0008, base + 0x04);
- outw(0x0002, base + 0x06);
-}
-
-static void disable_watchdogs(void)
-{
- disable_esb6300_watchdog();
- print_debug("Watchdogs disabled\n");
-}
diff --git a/src/mainboard/supermicro/x6dhe_g/Kconfig b/src/mainboard/supermicro/x6dhe_g/Kconfig
deleted file mode 100644
index d520415..0000000
--- a/src/mainboard/supermicro/x6dhe_g/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-if BOARD_SUPERMICRO_X6DHE_G
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_INTEL_SOCKET_MPGA604
- select NORTHBRIDGE_INTEL_E7520
- select SOUTHBRIDGE_INTEL_ESB6300
- select SOUTHBRIDGE_INTEL_PXHD
- select SUPERIO_WINBOND_W83627HF
- select ROMCC
- select HAVE_HARD_RESET
- select HAVE_OPTION_TABLE
- select HAVE_PIRQ_TABLE
- select HAVE_MP_TABLE
- select BOARD_ROMSIZE_KB_1024
-
-config MAINBOARD_DIR
- string
- default supermicro/x6dhe_g
-
-config MAINBOARD_PART_NUMBER
- string
- default "X6DHE-G"
-
-config MAX_CPUS
- int
- default 4
-
-config IRQ_SLOT_COUNT
- int
- default 15
-
-endif # BOARD_SUPERMICRO_X6DHE_G
diff --git a/src/mainboard/supermicro/x6dhe_g/board_info.txt b/src/mainboard/supermicro/x6dhe_g/board_info.txt
deleted file mode 100644
index 5d4f089..0000000
--- a/src/mainboard/supermicro/x6dhe_g/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: server
-Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7525/X6DAi-G.cfm
diff --git a/src/mainboard/supermicro/x6dhe_g/cmos.layout b/src/mainboard/supermicro/x6dhe_g/cmos.layout
deleted file mode 100644
index 635555e..0000000
--- a/src/mainboard/supermicro/x6dhe_g/cmos.layout
+++ /dev/null
@@ -1,78 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-395 1 e 2 hyper_threading
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/supermicro/x6dhe_g/debug.c b/src/mainboard/supermicro/x6dhe_g/debug.c
deleted file mode 100644
index 93199d7..0000000
--- a/src/mainboard/supermicro/x6dhe_g/debug.c
+++ /dev/null
@@ -1,328 +0,0 @@
-#include <spd.h>
-
-static void print_reg(unsigned char index)
-{
- unsigned char data;
-
- outb(index, 0x2e);
- data = inb(0x2f);
- print_debug("0x");
- print_debug_hex8(index);
- print_debug(": 0x");
- print_debug_hex8(data);
- print_debug("\n");
- return;
-}
-
-static void xbus_en(void)
-{
- /* select the XBUS function in the SIO */
- outb(0x07, 0x2e);
- outb(0x0f, 0x2f);
- outb(0x30, 0x2e);
- outb(0x01, 0x2f);
- return;
-}
-
-static void setup_func(unsigned char func)
-{
- /* select the function in the SIO */
- outb(0x07, 0x2e);
- outb(func, 0x2f);
- /* print out the regs */
- print_reg(0x30);
- print_reg(0x60);
- print_reg(0x61);
- print_reg(0x62);
- print_reg(0x63);
- print_reg(0x70);
- print_reg(0x71);
- print_reg(0x74);
- print_reg(0x75);
- return;
-}
-
-static void siodump(void)
-{
- int i;
- unsigned char data;
-
- print_debug("\n*** SERVER I/O REGISTERS ***\n");
- for (i=0x10; i<=0x2d; i++) {
- print_reg((unsigned char)i);
- }
-#if 0
- print_debug("\n*** XBUS REGISTERS ***\n");
- setup_func(0x0f);
- for (i=0xf0; i<=0xff; i++) {
- print_reg((unsigned char)i);
- }
-
- print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n");
- setup_func(0x03);
- print_reg(0xf0);
-
- print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n");
- setup_func(0x02);
- print_reg(0xf0);
-
-#endif
- print_debug("\n*** GPIO REGISTERS ***\n");
- setup_func(0x07);
- for (i=0xf0; i<=0xf8; i++) {
- print_reg((unsigned char)i);
- }
- print_debug("\n*** GPIO VALUES ***\n");
- data = inb(0x68a);
- print_debug("\nGPDO 4: 0x");
- print_debug_hex8(data);
- data = inb(0x68b);
- print_debug("\nGPDI 4: 0x");
- print_debug_hex8(data);
- print_debug("\n");
-
-#if 0
-
- print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n");
- setup_func(0x0a);
- print_reg(0xf0);
-
- print_debug("\n*** FAN CONTROL REGISTERS ***\n");
- setup_func(0x09);
- print_reg(0xf0);
- print_reg(0xf1);
-
- print_debug("\n*** RTC REGISTERS ***\n");
- setup_func(0x10);
- print_reg(0xf0);
- print_reg(0xf1);
- print_reg(0xf3);
- print_reg(0xf6);
- print_reg(0xf7);
- print_reg(0xfe);
- print_reg(0xff);
-
- print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n");
- setup_func(0x14);
- print_reg(0xf0);
-#endif
- return;
-}
-
-static void print_debug_pci_dev(unsigned dev)
-{
- print_debug("PCI: ");
- print_debug_hex8((dev >> 16) & 0xff);
- print_debug_char(':');
- print_debug_hex8((dev >> 11) & 0x1f);
- print_debug_char('.');
- print_debug_hex8((dev >> 8) & 7);
-}
-
-static void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- print_debug_pci_dev(dev);
- print_debug("\n");
- }
-}
-
-static void dump_pci_device(unsigned dev)
-{
- int i;
- print_debug_pci_dev(dev);
- print_debug("\n");
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
- print_debug_char(' ');
- print_debug_hex8(val);
- if ((i & 0x0f) == 0x0f) {
- print_debug("\n");
- }
- }
-}
-
-static void dump_bar14(unsigned dev)
-{
- int i;
- unsigned long bar;
-
- print_debug("BAR 14 Dump\n");
-
- bar = pci_read_config32(dev, 0x14);
- for(i = 0; i <= 0x300; i+=4) {
-#if 0
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
-#endif
- if((i%4)==0) {
- print_debug("\n");
- print_debug_hex16(i);
- print_debug_char(' ');
- }
- print_debug_hex32(read32(bar + i));
- print_debug_char(' ');
- }
- print_debug("\n");
-}
-
-static void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
-#if 0
-static void dump_spd_registers(const struct mem_controller *ctrl)
-{
- int i;
- print_debug("\n");
- for(i = 0; i < 4; i++) {
- unsigned device;
- device = ctrl->channel0[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".0: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- device = ctrl->channel1[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".1: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- }
-}
-#endif
-
-void dump_spd_registers(void)
-{
- unsigned device;
- device = DIMM0;
- while(device <= DIMM7) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("dimm ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 256) ; i++) {
- unsigned char byte;
- if ((i % 16) == 0) {
- print_debug("\n");
- print_debug_hex8(i);
- print_debug(": ");
- }
- status = smbus_read_byte(device, i);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
-
-void dump_ipmi_registers(void)
-{
- unsigned device;
- device = 0x42;
- while(device <= 0x42) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("ipmi ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 8) ; i++) {
- unsigned char byte;
- status = smbus_read_byte(device, 2);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
diff --git a/src/mainboard/supermicro/x6dhe_g/devicetree.cb b/src/mainboard/supermicro/x6dhe_g/devicetree.cb
deleted file mode 100644
index 322860b..0000000
--- a/src/mainboard/supermicro/x6dhe_g/devicetree.cb
+++ /dev/null
@@ -1,81 +0,0 @@
-chip northbridge/intel/e7520 # MCH
- device domain 0 on
- subsystemid 0x15d9 0x6080 inherit
- chip southbridge/intel/esb6300 # ESB6300
- register "pirq_a_d" = "0x0b070a05"
- register "pirq_e_h" = "0x0a808080"
-
- device pci 1c.0 on
- chip drivers/generic/generic
- device pci 01.0 on end # onboard gige1
- device pci 02.0 on end # onboard gige2
- end
- end
-
- # USB ports
- device pci 1d.0 on end
- device pci 1d.1 on end
- device pci 1d.4 on end # Southbridge Watchdog timer
- device pci 1d.5 on end # Southbridge I/O apic1
- device pci 1d.7 on end
-
- # VGA / PCI 32-bit
- device pci 1e.0 on
- chip drivers/generic/generic
- device pci 01.0 on end
- end
- end
-
-
- device pci 1f.0 on # ISA bridge
- chip superio/winbond/w83627hf
- device pnp 2e.0 off end
- device pnp 2e.2 on
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.4 off end
- device pnp 2e.5 off end
- device pnp 2e.6 off end
- device pnp 2e.7 off end
- device pnp 2e.9 off end
- device pnp 2e.a on end
- device pnp 2e.b off end
- end
- end
- device pci 1f.1 on end
- device pci 1f.2 off end
- device pci 1f.3 on end # SMBus
- device pci 1f.5 off end
- device pci 1f.6 off end
- end
-
- device pci 00.0 on end # Northbridge
- device pci 00.1 on end # Northbridge Error reporting
- device pci 01.0 on end
- device pci 02.0 on
- chip southbridge/intel/pxhd # PXHD 6700
- device pci 00.0 on end # bridge
- device pci 00.1 on end # I/O apic
- device pci 00.2 on end # bridge
- device pci 00.3 on end # I/O apic
- end
- end
-# device register "intrline" = "0x00070105"
- device pci 04.0 on end
- device pci 06.0 on end
- end
-
- device cpu_cluster 0 on
- chip cpu/intel/socket_mPGA604 # CPU 0
- device lapic 0 on end
- end
- chip cpu/intel/socket_mPGA604 # CPU 1
- device lapic 6 on end
- end
- end
-end
diff --git a/src/mainboard/supermicro/x6dhe_g/irq_tables.c b/src/mainboard/supermicro/x6dhe_g/irq_tables.c
deleted file mode 100644
index 0d2f563..0000000
--- a/src/mainboard/supermicro/x6dhe_g/irq_tables.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- 0x52495024, /* u32 signature */
- 0x0100, /* u16 version */
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
- 0x00, /* u8 Bus 0 */
- 0xf8, /* u8 Device 1, Function 0 */
- 0x0000, /* u16 reserve IRQ for PCI */
- 0x8086, /* u16 Vendor */
- 0x25a1, /* Device ID */
- 0x00000000, /* u32 miniport_data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xc4, /* u8 checksum - mod 256 checksum must give zero */
- { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00},
- {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00}
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/supermicro/x6dhe_g/mptable.c b/src/mainboard/supermicro/x6dhe_g/mptable.c
deleted file mode 100644
index ab73fc7..0000000
--- a/src/mainboard/supermicro/x6dhe_g/mptable.c
+++ /dev/null
@@ -1,132 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <arch/ioapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-
-static void *smp_write_config_table(void *v)
-{
- struct mp_config_table *mc;
- int bus_isa;
- unsigned char bus_pxhd_1;
- unsigned char bus_pxhd_2;
- unsigned char bus_esb6300_1;
- unsigned char bus_esb6300_2;
-
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-
- mptable_init(mc, LOCAL_APIC_ADDR);
-
- smp_write_processors(mc);
-
- {
- device_t dev;
-
- /* esb6300_2 */
- dev = dev_find_slot(0, PCI_DEVFN(0x1c,0));
- if (dev) {
- bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n");
- bus_esb6300_1 = 6;
- }
- /* esb6300_1 */
- dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
- if (dev) {
- bus_esb6300_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
- bus_esb6300_2 = 7;
- }
- /* pxhd-1 */
- dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
- if (dev) {
- bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
- bus_pxhd_1 = 2;
- }
- /* pxhd-2 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
- if (dev) {
- bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
- bus_pxhd_2 = 3;
- }
- }
-
- mptable_write_buses(mc, NULL, &bus_isa);
-
- /* IOAPIC handling */
-
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
- smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
- {
- struct resource *res;
- device_t dev;
- /* PXHd apic 4 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,1));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x04, 0x20, res->base);
- }
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
- printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
- }
- /* PXHd apic 5 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x05, 0x20, res->base);
- }
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
- printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
- }
- }
-
- mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
-
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x74, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x77, 0x02, 0x17);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x75, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7c, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7d, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- 0x03, 0x08, 0x05, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- 0x03, 0x08, 0x05, 0x04);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_1, 0x04, 0x03, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_1, 0x08, 0x03, 0x01);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_2, 0x04, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_2, 0x08, 0x02, 0x14);
-
- /* Standard local interrupt assignments */
- mptable_lintsrc(mc, bus_isa);
-
- /* FIXME verify I have the irqs handled for all of the risers */
-
- /* Compute the checksums */
- return mptable_finalize(mc);
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
- void *v;
- v = smp_write_floating_table(addr, 0);
- return (unsigned long)smp_write_config_table(v);
-}
diff --git a/src/mainboard/supermicro/x6dhe_g/romstage.c b/src/mainboard/supermicro/x6dhe_g/romstage.c
deleted file mode 100644
index 405a2bc..0000000
--- a/src/mainboard/supermicro/x6dhe_g/romstage.c
+++ /dev/null
@@ -1,105 +0,0 @@
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include "drivers/pc80/udelay_io.c"
-#include "lib/delay.c"
-#include "southbridge/intel/esb6300/early_smbus.c"
-#include "northbridge/intel/e7520/raminit.h"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "debug.c"
-#include "watchdog.c"
-#include "southbridge/intel/esb6300/reset.c"
-#include "superio/winbond/w83627hf/early_serial.c"
-#include <superio/winbond/w83627hf/w83627hf.h>
-#include "northbridge/intel/e7520/memory_initialized.c"
-#include "cpu/x86/bist.h"
-#include <spd.h>
-
-#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2)
-#define DUMMY_DEV PNP_DEV(0x2e, 0)
-
-#define DEVPRES_CONFIG ( \
- DEVPRES_D1F0 | \
- DEVPRES_D2F0 | \
- DEVPRES_D3F0 | \
- DEVPRES_D4F0 | \
- DEVPRES_D6F0 | \
- 0 )
-#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-
-static void mch_reset(void) {}
-static void mainboard_set_e7520_pll(unsigned bits) {}
-static void mainboard_set_e7520_leds(void) {}
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/e7520/raminit.c"
-#include "lib/generic_sdram.c"
-#include "arch/x86/lib/stages.c"
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- static const struct mem_controller mch[] = {
- {
- .node_id = 0,
- .channel0 = {DIMM0, DIMM1, DIMM2, DIMM3, },
- .channel1 = {DIMM4, DIMM5, DIMM6, DIMM7, },
- }
- };
-
- if (bist == 0) {
- /* Skip this if there was a built in self test failure */
- early_mtrr_init();
- if (memory_initialized())
- skip_romstage();
- }
-
- w83627hf_set_clksel_48(DUMMY_DEV);
- w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
-
- /* Halt if there was a built in self test failure */
-// report_bist_failure(bist);
-
- /* MOVE ME TO A BETTER LOCATION !!! */
- /* config LPC decode for flash memory access */
- device_t dev;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID)
- die("Missing esb6300?");
- pci_write_config32(dev, 0xe8, 0x00000000);
- pci_write_config8(dev, 0xf0, 0x00);
-
-#if 0
- display_cpuid_update_microcode();
- print_pci_devices();
-#endif
-#if 1
- enable_smbus();
-#endif
-#if 0
-// dump_spd_registers(&cpu[0]);
- int i;
- for(i = 0; i < 1; i++)
- dump_spd_registers();
-#endif
- disable_watchdogs();
-// dump_ipmi_registers();
-// mainboard_set_e7520_leds();
- sdram_initialize(ARRAY_SIZE(mch), mch);
-#if 0
- dump_pci_devices();
- dump_pci_device(PCI_DEV(0, 0x00, 0));
- dump_bar14(PCI_DEV(0, 0x00, 0));
-#endif
-}
diff --git a/src/mainboard/supermicro/x6dhe_g/watchdog.c b/src/mainboard/supermicro/x6dhe_g/watchdog.c
deleted file mode 100644
index 1d34f7d..0000000
--- a/src/mainboard/supermicro/x6dhe_g/watchdog.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <device/pnp_def.h>
-
-#define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
-#define NSC_WDBASE 0x600
-#define ESB6300_WDBASE 0x400
-#define ESB6300_GPIOBASE 0x500
-
-static void disable_sio_watchdog(device_t dev)
-{
-#if 0
- /* FIXME move me somewhere more appropriate */
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 1);
- pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE);
- /* disable the sio watchdog */
- outb(0, NSC_WDBASE + 0);
- pnp_set_enable(dev, 0);
-#endif
-}
-
-static void disable_esb6300_watchdog(void)
-{
- /* FIXME move me somewhere more appropriate */
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing esb6300?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 10);
- pci_write_config16(dev, 0x04, value);
-
- /* Set and enable acpibase */
- pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
- pci_write_config8(dev, 0x44, 0x10);
- base = ESB6300_WDBASE + 0x60;
-
- /* Set bit 11 in TCO1_CNT */
- value = inw(base + 0x08);
- value |= 1 << 11;
- outw(value, base + 0x08);
-
- /* Clear TCO timeout status */
- outw(0x0008, base + 0x04);
- outw(0x0002, base + 0x06);
-}
-
-static void disable_jarell_frb3(void)
-{
-#if 0
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing esb6300?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 0);
- pci_write_config16(dev, 0x04, value);
-
- /* Set gpio base */
- pci_write_config32(dev, 0x58, ESB6300_GPIOBASE | 1);
- base = ESB6300_GPIOBASE;
-
- /* Enable GPIO Bar */
- value = pci_read_config32(dev, 0x5c);
- value |= 0x10;
- pci_write_config32(dev, 0x5c, value);
-
- /* Configure GPIO 48 and 40 as GPIO */
- value = inl(base + 0x30);
- value |= (1 << 16) | ( 1 << 8);
- outl(value, base + 0x30);
-
- /* Configure GPIO 48 as Output */
- value = inl(base + 0x34);
- value &= ~(1 << 16);
- outl(value, base + 0x34);
-
- /* Toggle GPIO 48 high to low */
- value = inl(base + 0x38);
- value |= (1 << 16);
- outl(value, base + 0x38);
- value &= ~(1 << 16);
- outl(value, base + 0x38);
-#endif
-}
-
-static void disable_watchdogs(void)
-{
-// disable_sio_watchdog(NSC_WD_DEV);
- disable_esb6300_watchdog();
-// disable_jarell_frb3();
- print_debug("Watchdogs disabled\n");
-}
diff --git a/src/mainboard/supermicro/x6dhe_g2/Kconfig b/src/mainboard/supermicro/x6dhe_g2/Kconfig
deleted file mode 100644
index 159c9c3..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-if BOARD_SUPERMICRO_X6DHE_G2
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_INTEL_SOCKET_MPGA604
- select NORTHBRIDGE_INTEL_E7520
- select SOUTHBRIDGE_INTEL_I82801EX
- select SOUTHBRIDGE_INTEL_PXHD
- select SUPERIO_NSC_PC87427
- select ROMCC
- select HAVE_OPTION_TABLE
- select HAVE_PIRQ_TABLE
- select HAVE_MP_TABLE
- select BOARD_ROMSIZE_KB_1024
- select USE_WATCHDOG_ON_BOOT
-
-config MAINBOARD_DIR
- string
- default supermicro/x6dhe_g2
-
-config MAINBOARD_PART_NUMBER
- string
- default "X6DHE-G2"
-
-config MAX_CPUS
- int
- default 4
-
-config IRQ_SLOT_COUNT
- int
- default 15
-
-endif # BOARD_SUPERMICRO_X6DHE_G2
diff --git a/src/mainboard/supermicro/x6dhe_g2/board_info.txt b/src/mainboard/supermicro/x6dhe_g2/board_info.txt
deleted file mode 100644
index 093f85f..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: server
-Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7520/X6DHE-G2.cfm
diff --git a/src/mainboard/supermicro/x6dhe_g2/cmos.layout b/src/mainboard/supermicro/x6dhe_g2/cmos.layout
deleted file mode 100644
index 635555e..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/cmos.layout
+++ /dev/null
@@ -1,78 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-395 1 e 2 hyper_threading
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/supermicro/x6dhe_g2/debug.c b/src/mainboard/supermicro/x6dhe_g2/debug.c
deleted file mode 100644
index 93199d7..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/debug.c
+++ /dev/null
@@ -1,328 +0,0 @@
-#include <spd.h>
-
-static void print_reg(unsigned char index)
-{
- unsigned char data;
-
- outb(index, 0x2e);
- data = inb(0x2f);
- print_debug("0x");
- print_debug_hex8(index);
- print_debug(": 0x");
- print_debug_hex8(data);
- print_debug("\n");
- return;
-}
-
-static void xbus_en(void)
-{
- /* select the XBUS function in the SIO */
- outb(0x07, 0x2e);
- outb(0x0f, 0x2f);
- outb(0x30, 0x2e);
- outb(0x01, 0x2f);
- return;
-}
-
-static void setup_func(unsigned char func)
-{
- /* select the function in the SIO */
- outb(0x07, 0x2e);
- outb(func, 0x2f);
- /* print out the regs */
- print_reg(0x30);
- print_reg(0x60);
- print_reg(0x61);
- print_reg(0x62);
- print_reg(0x63);
- print_reg(0x70);
- print_reg(0x71);
- print_reg(0x74);
- print_reg(0x75);
- return;
-}
-
-static void siodump(void)
-{
- int i;
- unsigned char data;
-
- print_debug("\n*** SERVER I/O REGISTERS ***\n");
- for (i=0x10; i<=0x2d; i++) {
- print_reg((unsigned char)i);
- }
-#if 0
- print_debug("\n*** XBUS REGISTERS ***\n");
- setup_func(0x0f);
- for (i=0xf0; i<=0xff; i++) {
- print_reg((unsigned char)i);
- }
-
- print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n");
- setup_func(0x03);
- print_reg(0xf0);
-
- print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n");
- setup_func(0x02);
- print_reg(0xf0);
-
-#endif
- print_debug("\n*** GPIO REGISTERS ***\n");
- setup_func(0x07);
- for (i=0xf0; i<=0xf8; i++) {
- print_reg((unsigned char)i);
- }
- print_debug("\n*** GPIO VALUES ***\n");
- data = inb(0x68a);
- print_debug("\nGPDO 4: 0x");
- print_debug_hex8(data);
- data = inb(0x68b);
- print_debug("\nGPDI 4: 0x");
- print_debug_hex8(data);
- print_debug("\n");
-
-#if 0
-
- print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n");
- setup_func(0x0a);
- print_reg(0xf0);
-
- print_debug("\n*** FAN CONTROL REGISTERS ***\n");
- setup_func(0x09);
- print_reg(0xf0);
- print_reg(0xf1);
-
- print_debug("\n*** RTC REGISTERS ***\n");
- setup_func(0x10);
- print_reg(0xf0);
- print_reg(0xf1);
- print_reg(0xf3);
- print_reg(0xf6);
- print_reg(0xf7);
- print_reg(0xfe);
- print_reg(0xff);
-
- print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n");
- setup_func(0x14);
- print_reg(0xf0);
-#endif
- return;
-}
-
-static void print_debug_pci_dev(unsigned dev)
-{
- print_debug("PCI: ");
- print_debug_hex8((dev >> 16) & 0xff);
- print_debug_char(':');
- print_debug_hex8((dev >> 11) & 0x1f);
- print_debug_char('.');
- print_debug_hex8((dev >> 8) & 7);
-}
-
-static void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- print_debug_pci_dev(dev);
- print_debug("\n");
- }
-}
-
-static void dump_pci_device(unsigned dev)
-{
- int i;
- print_debug_pci_dev(dev);
- print_debug("\n");
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
- print_debug_char(' ');
- print_debug_hex8(val);
- if ((i & 0x0f) == 0x0f) {
- print_debug("\n");
- }
- }
-}
-
-static void dump_bar14(unsigned dev)
-{
- int i;
- unsigned long bar;
-
- print_debug("BAR 14 Dump\n");
-
- bar = pci_read_config32(dev, 0x14);
- for(i = 0; i <= 0x300; i+=4) {
-#if 0
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
-#endif
- if((i%4)==0) {
- print_debug("\n");
- print_debug_hex16(i);
- print_debug_char(' ');
- }
- print_debug_hex32(read32(bar + i));
- print_debug_char(' ');
- }
- print_debug("\n");
-}
-
-static void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
-#if 0
-static void dump_spd_registers(const struct mem_controller *ctrl)
-{
- int i;
- print_debug("\n");
- for(i = 0; i < 4; i++) {
- unsigned device;
- device = ctrl->channel0[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".0: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- device = ctrl->channel1[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".1: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- }
-}
-#endif
-
-void dump_spd_registers(void)
-{
- unsigned device;
- device = DIMM0;
- while(device <= DIMM7) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("dimm ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 256) ; i++) {
- unsigned char byte;
- if ((i % 16) == 0) {
- print_debug("\n");
- print_debug_hex8(i);
- print_debug(": ");
- }
- status = smbus_read_byte(device, i);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
-
-void dump_ipmi_registers(void)
-{
- unsigned device;
- device = 0x42;
- while(device <= 0x42) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("ipmi ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 8) ; i++) {
- unsigned char byte;
- status = smbus_read_byte(device, 2);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
diff --git a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb b/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
deleted file mode 100644
index 984814e..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/devicetree.cb
+++ /dev/null
@@ -1,81 +0,0 @@
-chip northbridge/intel/e7520 # MCH
- device domain 0 on
- subsystemid 0x15d9 0x6080 inherit
- chip southbridge/intel/i82801ex # ICH5R
- register "pirq_a_d" = "0x0b070a05"
- register "pirq_e_h" = "0x0a808080"
-
- device pci 1c.0 on
- chip drivers/generic/generic
- device pci 01.0 on end # onboard gige1
- device pci 02.0 on end # onboard gige2
- end
- end
-
- # USB ports
- device pci 1d.0 on end
- device pci 1d.1 on end
- device pci 1d.4 on end # Southbridge Watchdog timer
- device pci 1d.5 on end # Southbridge I/O apic1
- device pci 1d.7 on end
-
- # VGA / PCI 32-bit
- device pci 1e.0 on
- chip drivers/generic/generic
- device pci 01.0 on end
- end
- end
-
-
- device pci 1f.0 on # ISA bridge
- chip superio/nsc/pc87427
- device pnp 2e.0 off end
- device pnp 2e.2 on
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.4 off end
- device pnp 2e.5 off end
- device pnp 2e.6 off end
- device pnp 2e.7 off end
- device pnp 2e.9 off end
- device pnp 2e.a on end
- device pnp 2e.b off end
- end
- end
- device pci 1f.1 on end
- device pci 1f.2 on end
- device pci 1f.3 on end # SMBus
- device pci 1f.5 off end
- device pci 1f.6 off end
- end
-
- device pci 00.0 on end # Northbridge
- device pci 00.1 on end # Northbridge Error reporting
- device pci 01.0 on end
- device pci 02.0 on
- chip southbridge/intel/pxhd # PXHD 6700
- device pci 00.0 on end # bridge
- device pci 00.1 on end # I/O apic
- device pci 00.2 on end # bridge
- device pci 00.3 on end # I/O apic
- end
- end
-# device register "intrline" = "0x00070105"
- device pci 04.0 on end
- device pci 06.0 on end
- end
-
- device cpu_cluster 0 on
- chip cpu/intel/socket_mPGA604 # CPU 0
- device lapic 0 on end
- end
- chip cpu/intel/socket_mPGA604 # CPU 1
- device lapic 6 on end
- end
- end
-end
diff --git a/src/mainboard/supermicro/x6dhe_g2/irq_tables.c b/src/mainboard/supermicro/x6dhe_g2/irq_tables.c
deleted file mode 100644
index 0d2f563..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/irq_tables.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- 0x52495024, /* u32 signature */
- 0x0100, /* u16 version */
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
- 0x00, /* u8 Bus 0 */
- 0xf8, /* u8 Device 1, Function 0 */
- 0x0000, /* u16 reserve IRQ for PCI */
- 0x8086, /* u16 Vendor */
- 0x25a1, /* Device ID */
- 0x00000000, /* u32 miniport_data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xc4, /* u8 checksum - mod 256 checksum must give zero */
- { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00},
- {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00}
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/supermicro/x6dhe_g2/mptable.c b/src/mainboard/supermicro/x6dhe_g2/mptable.c
deleted file mode 100644
index a2b8c8d..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/mptable.c
+++ /dev/null
@@ -1,133 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <arch/ioapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-
-static void *smp_write_config_table(void *v)
-{
- struct mp_config_table *mc;
- int bus_isa;
- unsigned char bus_pxhd_1;
- unsigned char bus_pxhd_2;
- unsigned char bus_esb6300_1;
- unsigned char bus_esb6300_2;
-
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-
- mptable_init(mc, LOCAL_APIC_ADDR);
-
- smp_write_processors(mc);
-
- {
- device_t dev;
-
- /* esb6300_2 */
- dev = dev_find_slot(0, PCI_DEVFN(0x1c,0));
- if (dev) {
- bus_esb6300_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1c.0, using defaults\n");
- bus_esb6300_1 = 6;
- }
- /* esb6300_1 */
- dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
- if (dev) {
- bus_esb6300_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
- bus_esb6300_2 = 7;
- }
- /* pxhd-1 */
- dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
- if (dev) {
- bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
- bus_pxhd_1 = 2;
- }
- /* pxhd-2 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
- if (dev) {
- bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
- bus_pxhd_2 = 3;
- }
- }
-
- mptable_write_buses(mc, NULL, &bus_isa);
-
- /* IOAPIC handling */
-
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
- smp_write_ioapic(mc, 3, 0x20, IO_APIC_ADDR + 0x10000);
- {
- struct resource *res;
- device_t dev;
- /* PXHd apic 4 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,1));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x04, 0x20, res->base);
- }
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
- printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
- }
- /* PXHd apic 5 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x05, 0x20, res->base);
- }
- } else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
- printk(BIOS_DEBUG, "CONFIG_DEBUG: Dev= %p\n", dev);
- }
- }
-
- mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
-
- /* ISA backward compatibility interrupts */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x74, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x77, 0x02, 0x17);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x75, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7c, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7d, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- 0x03, 0x08, 0x05, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- 0x03, 0x08, 0x05, 0x04);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_1, 0x04, 0x03, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_1, 0x08, 0x03, 0x01);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_2, 0x04, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW, // -- added
- bus_esb6300_2, 0x08, 0x02, 0x14);
-
- /* Standard local interrupt assignments */
- mptable_lintsrc(mc, bus_isa);
-
- /* FIXME verify I have the irqs handled for all of the risers */
-
- /* Compute the checksums */
- return mptable_finalize(mc);
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
- void *v;
- v = smp_write_floating_table(addr, 0);
- return (unsigned long)smp_write_config_table(v);
-}
diff --git a/src/mainboard/supermicro/x6dhe_g2/romstage.c b/src/mainboard/supermicro/x6dhe_g2/romstage.c
deleted file mode 100644
index 48945eb..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/romstage.c
+++ /dev/null
@@ -1,107 +0,0 @@
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include "southbridge/intel/i82801ex/early_smbus.c"
-#include "northbridge/intel/e7520/raminit.h"
-#include "superio/nsc/pc87427/pc87427.h"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "debug.c"
-#include "watchdog.c"
-#include "southbridge/intel/i82801ex/reset.c"
-#include "superio/nsc/pc87427/early_init.c"
-#include "northbridge/intel/e7520/memory_initialized.c"
-#include "cpu/x86/bist.h"
-#include <spd.h>
-
-#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP1)
-#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, PC87427_SP2)
-
-#define DEVPRES_CONFIG ( \
- DEVPRES_D1F0 | \
- DEVPRES_D2F0 | \
- DEVPRES_D3F0 | \
- DEVPRES_D4F0 | \
- DEVPRES_D6F0 | \
- 0 )
-#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-
-static void mch_reset(void) {}
-static void mainboard_set_e7520_pll(unsigned bits) {}
-static void mainboard_set_e7520_leds(void) {}
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/e7520/raminit.c"
-#include "lib/generic_sdram.c"
-#include "arch/x86/lib/stages.c"
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- static const struct mem_controller mch[] = {
- {
- .node_id = 0,
- .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
- .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
- }
- };
-
- if (bist == 0) {
- /* Skip this if there was a built in self test failure */
- early_mtrr_init();
- if (memory_initialized())
- skip_romstage();
- }
-
- /* Setup the console */
- outb(0x87,0x2e);
- outb(0x87,0x2e);
- pnp_write_config(CONSOLE_SERIAL_DEV, 0x24, 0x84 | (1 << 6));
- pc87427_enable_dev(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
-
- /* Halt if there was a built in self test failure */
-// report_bist_failure(bist);
-
- /* MOVE ME TO A BETTER LOCATION !!! */
- /* config LPC decode for flash memory access */
- device_t dev;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID)
- die("Missing ich5r?");
- pci_write_config32(dev, 0xe8, 0x00000000);
- pci_write_config8(dev, 0xf0, 0x00);
-
-#if 0
- display_cpuid_update_microcode();
- print_pci_devices();
-#endif
-#if 1
- enable_smbus();
-#endif
-#if 0
-// dump_spd_registers(&cpu[0]);
- int i;
- for(i = 0; i < 1; i++)
- dump_spd_registers();
-#endif
- disable_watchdogs();
-// dump_ipmi_registers();
-// mainboard_set_e7520_leds();
- sdram_initialize(ARRAY_SIZE(mch), mch);
-#if 0
- dump_pci_devices();
-#endif
-#if 1
- dump_pci_device(PCI_DEV(0, 0x00, 0));
- //dump_bar14(PCI_DEV(0, 0x00, 0));
-#endif
-}
diff --git a/src/mainboard/supermicro/x6dhe_g2/watchdog.c b/src/mainboard/supermicro/x6dhe_g2/watchdog.c
deleted file mode 100644
index 1d34f7d..0000000
--- a/src/mainboard/supermicro/x6dhe_g2/watchdog.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <device/pnp_def.h>
-
-#define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
-#define NSC_WDBASE 0x600
-#define ESB6300_WDBASE 0x400
-#define ESB6300_GPIOBASE 0x500
-
-static void disable_sio_watchdog(device_t dev)
-{
-#if 0
- /* FIXME move me somewhere more appropriate */
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 1);
- pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE);
- /* disable the sio watchdog */
- outb(0, NSC_WDBASE + 0);
- pnp_set_enable(dev, 0);
-#endif
-}
-
-static void disable_esb6300_watchdog(void)
-{
- /* FIXME move me somewhere more appropriate */
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing esb6300?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 10);
- pci_write_config16(dev, 0x04, value);
-
- /* Set and enable acpibase */
- pci_write_config32(dev, 0x40, ESB6300_WDBASE | 1);
- pci_write_config8(dev, 0x44, 0x10);
- base = ESB6300_WDBASE + 0x60;
-
- /* Set bit 11 in TCO1_CNT */
- value = inw(base + 0x08);
- value |= 1 << 11;
- outw(value, base + 0x08);
-
- /* Clear TCO timeout status */
- outw(0x0008, base + 0x04);
- outw(0x0002, base + 0x06);
-}
-
-static void disable_jarell_frb3(void)
-{
-#if 0
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x25a1), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing esb6300?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 0);
- pci_write_config16(dev, 0x04, value);
-
- /* Set gpio base */
- pci_write_config32(dev, 0x58, ESB6300_GPIOBASE | 1);
- base = ESB6300_GPIOBASE;
-
- /* Enable GPIO Bar */
- value = pci_read_config32(dev, 0x5c);
- value |= 0x10;
- pci_write_config32(dev, 0x5c, value);
-
- /* Configure GPIO 48 and 40 as GPIO */
- value = inl(base + 0x30);
- value |= (1 << 16) | ( 1 << 8);
- outl(value, base + 0x30);
-
- /* Configure GPIO 48 as Output */
- value = inl(base + 0x34);
- value &= ~(1 << 16);
- outl(value, base + 0x34);
-
- /* Toggle GPIO 48 high to low */
- value = inl(base + 0x38);
- value |= (1 << 16);
- outl(value, base + 0x38);
- value &= ~(1 << 16);
- outl(value, base + 0x38);
-#endif
-}
-
-static void disable_watchdogs(void)
-{
-// disable_sio_watchdog(NSC_WD_DEV);
- disable_esb6300_watchdog();
-// disable_jarell_frb3();
- print_debug("Watchdogs disabled\n");
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig/Kconfig b/src/mainboard/supermicro/x6dhr_ig/Kconfig
deleted file mode 100644
index e02b2dd..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-if BOARD_SUPERMICRO_X6DHR_IG
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_INTEL_SOCKET_MPGA604
- select NORTHBRIDGE_INTEL_E7520
- select SOUTHBRIDGE_INTEL_I82801EX
- select SOUTHBRIDGE_INTEL_PXHD
- select SUPERIO_WINBOND_W83627HF
- select ROMCC
- select HAVE_OPTION_TABLE
- select HAVE_PIRQ_TABLE
- select HAVE_MP_TABLE
- select USE_WATCHDOG_ON_BOOT
- select BOARD_ROMSIZE_KB_1024
-
-config MAINBOARD_DIR
- string
- default supermicro/x6dhr_ig
-
-config MAINBOARD_PART_NUMBER
- string
- default "X6DHR-iG"
-
-config MAX_CPUS
- int
- default 4
-
-config IRQ_SLOT_COUNT
- int
- default 15
-
-endif # BOARD_SUPERMICRO_X6DHR_IG
diff --git a/src/mainboard/supermicro/x6dhr_ig/board_info.txt b/src/mainboard/supermicro/x6dhr_ig/board_info.txt
deleted file mode 100644
index f8d9fe3..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: server
-Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7520/X6DHR-iG.cfm
diff --git a/src/mainboard/supermicro/x6dhr_ig/cmos.layout b/src/mainboard/supermicro/x6dhr_ig/cmos.layout
deleted file mode 100644
index 635555e..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/cmos.layout
+++ /dev/null
@@ -1,78 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-395 1 e 2 hyper_threading
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/supermicro/x6dhr_ig/debug.c b/src/mainboard/supermicro/x6dhr_ig/debug.c
deleted file mode 100644
index 93199d7..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/debug.c
+++ /dev/null
@@ -1,328 +0,0 @@
-#include <spd.h>
-
-static void print_reg(unsigned char index)
-{
- unsigned char data;
-
- outb(index, 0x2e);
- data = inb(0x2f);
- print_debug("0x");
- print_debug_hex8(index);
- print_debug(": 0x");
- print_debug_hex8(data);
- print_debug("\n");
- return;
-}
-
-static void xbus_en(void)
-{
- /* select the XBUS function in the SIO */
- outb(0x07, 0x2e);
- outb(0x0f, 0x2f);
- outb(0x30, 0x2e);
- outb(0x01, 0x2f);
- return;
-}
-
-static void setup_func(unsigned char func)
-{
- /* select the function in the SIO */
- outb(0x07, 0x2e);
- outb(func, 0x2f);
- /* print out the regs */
- print_reg(0x30);
- print_reg(0x60);
- print_reg(0x61);
- print_reg(0x62);
- print_reg(0x63);
- print_reg(0x70);
- print_reg(0x71);
- print_reg(0x74);
- print_reg(0x75);
- return;
-}
-
-static void siodump(void)
-{
- int i;
- unsigned char data;
-
- print_debug("\n*** SERVER I/O REGISTERS ***\n");
- for (i=0x10; i<=0x2d; i++) {
- print_reg((unsigned char)i);
- }
-#if 0
- print_debug("\n*** XBUS REGISTERS ***\n");
- setup_func(0x0f);
- for (i=0xf0; i<=0xff; i++) {
- print_reg((unsigned char)i);
- }
-
- print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n");
- setup_func(0x03);
- print_reg(0xf0);
-
- print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n");
- setup_func(0x02);
- print_reg(0xf0);
-
-#endif
- print_debug("\n*** GPIO REGISTERS ***\n");
- setup_func(0x07);
- for (i=0xf0; i<=0xf8; i++) {
- print_reg((unsigned char)i);
- }
- print_debug("\n*** GPIO VALUES ***\n");
- data = inb(0x68a);
- print_debug("\nGPDO 4: 0x");
- print_debug_hex8(data);
- data = inb(0x68b);
- print_debug("\nGPDI 4: 0x");
- print_debug_hex8(data);
- print_debug("\n");
-
-#if 0
-
- print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n");
- setup_func(0x0a);
- print_reg(0xf0);
-
- print_debug("\n*** FAN CONTROL REGISTERS ***\n");
- setup_func(0x09);
- print_reg(0xf0);
- print_reg(0xf1);
-
- print_debug("\n*** RTC REGISTERS ***\n");
- setup_func(0x10);
- print_reg(0xf0);
- print_reg(0xf1);
- print_reg(0xf3);
- print_reg(0xf6);
- print_reg(0xf7);
- print_reg(0xfe);
- print_reg(0xff);
-
- print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n");
- setup_func(0x14);
- print_reg(0xf0);
-#endif
- return;
-}
-
-static void print_debug_pci_dev(unsigned dev)
-{
- print_debug("PCI: ");
- print_debug_hex8((dev >> 16) & 0xff);
- print_debug_char(':');
- print_debug_hex8((dev >> 11) & 0x1f);
- print_debug_char('.');
- print_debug_hex8((dev >> 8) & 7);
-}
-
-static void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- print_debug_pci_dev(dev);
- print_debug("\n");
- }
-}
-
-static void dump_pci_device(unsigned dev)
-{
- int i;
- print_debug_pci_dev(dev);
- print_debug("\n");
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
- print_debug_char(' ');
- print_debug_hex8(val);
- if ((i & 0x0f) == 0x0f) {
- print_debug("\n");
- }
- }
-}
-
-static void dump_bar14(unsigned dev)
-{
- int i;
- unsigned long bar;
-
- print_debug("BAR 14 Dump\n");
-
- bar = pci_read_config32(dev, 0x14);
- for(i = 0; i <= 0x300; i+=4) {
-#if 0
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
-#endif
- if((i%4)==0) {
- print_debug("\n");
- print_debug_hex16(i);
- print_debug_char(' ');
- }
- print_debug_hex32(read32(bar + i));
- print_debug_char(' ');
- }
- print_debug("\n");
-}
-
-static void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
-#if 0
-static void dump_spd_registers(const struct mem_controller *ctrl)
-{
- int i;
- print_debug("\n");
- for(i = 0; i < 4; i++) {
- unsigned device;
- device = ctrl->channel0[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".0: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- device = ctrl->channel1[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".1: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- }
-}
-#endif
-
-void dump_spd_registers(void)
-{
- unsigned device;
- device = DIMM0;
- while(device <= DIMM7) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("dimm ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 256) ; i++) {
- unsigned char byte;
- if ((i % 16) == 0) {
- print_debug("\n");
- print_debug_hex8(i);
- print_debug(": ");
- }
- status = smbus_read_byte(device, i);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
-
-void dump_ipmi_registers(void)
-{
- unsigned device;
- device = 0x42;
- while(device <= 0x42) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("ipmi ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 8) ; i++) {
- unsigned char byte;
- status = smbus_read_byte(device, 2);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
deleted file mode 100644
index 3a037fb..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/devicetree.cb
+++ /dev/null
@@ -1,85 +0,0 @@
-chip northbridge/intel/e7520 # mch
- device domain 0 on
- subsystemid 0x15d9 0x5580 inherit
- chip southbridge/intel/i82801ex # i82801er
- # USB ports
- device pci 1d.0 on end
- device pci 1d.1 on end
- device pci 1d.2 on end
- device pci 1d.3 on end
- device pci 1d.7 on end
-
- # -> VGA
- device pci 1e.0 on end
-
- # -> IDE
- device pci 1f.0 on
- chip superio/winbond/w83627hf
- device pnp 2e.0 off end
- device pnp 2e.2 on
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.4 off end
- device pnp 2e.5 off end
- device pnp 2e.6 off end
- device pnp 2e.7 off end
- device pnp 2e.9 off end
- device pnp 2e.a on end
- device pnp 2e.b off end
- end
- end
- device pci 1f.1 on end
- device pci 1f.2 on end
- device pci 1f.3 on end
-
- register "pirq_a_d" = "0x0b070a05"
- register "pirq_e_h" = "0x0a808080"
- end
- device pci 00.0 on end
- device pci 00.1 on end
- device pci 01.0 on end
- device pci 02.0 on end
- device pci 03.0 on
- chip southbridge/intel/pxhd # pxhd1
- # Bus bridges and ioapics usually bus 2
- device pci 0.0 on end
- device pci 0.1 on end
- device pci 0.2 on
- # On board gig e1000
- chip drivers/generic/generic
- device pci 02.0 on end
- device pci 02.1 on end
- end
- end
- device pci 0.3 on end
- end
- end
- device pci 04.0 on
- chip southbridge/intel/pxhd # pxhd2
- # Bus bridges and ioapics usually bus 5
- device pci 0.0 on end
- # Slot 6 is usually 6:2.0
- device pci 0.1 on end
- device pci 0.2 on end
- # Slot 7 is usually 7:2.0
- device pci 0.3 on end
- end
- end
- device pci 06.0 on end
- end
- device cpu_cluster 0 on
- chip cpu/intel/socket_mPGA604 # cpu 0
- device lapic 0 on end
- end
- chip cpu/intel/socket_mPGA604 # cpu 1
- device lapic 6 on end
- end
- end
- register "intrline" = "0x00070105"
-end
-
diff --git a/src/mainboard/supermicro/x6dhr_ig/irq_tables.c b/src/mainboard/supermicro/x6dhr_ig/irq_tables.c
deleted file mode 100644
index 72f4125..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/irq_tables.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- 0x52495024, /* u32 signature */
- 0x0100, /* u16 version */
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
- 0x00, /* u8 Bus 0 */
- 0xf8, /* u8 Device 1, Function 0 */
- 0x0000, /* u16 reserve IRQ for PCI */
- 0x8086, /* u16 Vendor */
- 0x24d0, /* Device ID */
- 0x00000000, /* u32 miniport_data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xc4, /* u8 checksum - mod 256 checksum must give zero */
- { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00},
- {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00}
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig/mptable.c b/src/mainboard/supermicro/x6dhr_ig/mptable.c
deleted file mode 100644
index f9165d6..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/mptable.c
+++ /dev/null
@@ -1,180 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <arch/ioapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-
-static void *smp_write_config_table(void *v)
-{
- struct mp_config_table *mc;
- int bus_isa;
- unsigned char bus_pxhd_1;
- unsigned char bus_pxhd_2;
- unsigned char bus_pxhd_3;
- unsigned char bus_pxhd_4;
- unsigned char bus_ich5r_1;
-
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-
- mptable_init(mc, LOCAL_APIC_ADDR);
-
- smp_write_processors(mc);
-
- {
- device_t dev;
-
- /* ich5r */
- dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
- if (dev) {
- bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1f.0, using defaults\n");
-
- bus_ich5r_1 = 9;
- }
- /* pxhd-1 */
- dev = dev_find_slot(2, PCI_DEVFN(0x0,0));
- if (dev) {
- bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
-
- bus_pxhd_1 = 3;
- }
- /* pxhd-2 */
- dev = dev_find_slot(2, PCI_DEVFN(0x00,2));
- if (dev) {
- bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
-
- bus_pxhd_2 = 4;
- }
-
- /* pxhd-3 */
- dev = dev_find_slot(5, PCI_DEVFN(0x0,0));
- if (dev) {
- bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.1, using defaults\n");
-
- bus_pxhd_3 = 6;
- }
- /* pxhd-4 */
- dev = dev_find_slot(5, PCI_DEVFN(0x00,2));
- if (dev) {
- bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:02.0, using defaults\n");
-
- bus_pxhd_4 = 7;
- }
-
- }
-
- mptable_write_buses(mc, NULL, &bus_isa);
-
- /* IOAPIC handling */
-
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
- {
- struct resource *res;
- device_t dev;
- /* pxhd apic 3 */
- dev = dev_find_slot(2, PCI_DEVFN(0x00,1));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x03, 0x20, res->base);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.1\n");
- }
- /* pxhd apic 4 */
- dev = dev_find_slot(2, PCI_DEVFN(0x00,3));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x04, 0x20, res->base);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 2:00.3\n");
- }
- /* pxhd apic 5 */
- dev = dev_find_slot(5, PCI_DEVFN(0x00,1));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x05, 0x20, res->base);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.1\n");
- }
- /* pxhd apic 8 */
- dev = dev_find_slot(5, PCI_DEVFN(0x00,3));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x08, 0x20, res->base);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 5:00.3\n");
- }
- }
-
- mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
-
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x74, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x76, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x77, 0x02, 0x17);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x75, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x74, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7c, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7d, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_2, 0x08, 0x04, 0x06);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_2, 0x09, 0x04, 0x07);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_3, 0x08, 0x05, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_4, 0x08, 0x08, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- (bus_isa - 1), 0x04, 0x02, 0x10);
-
- /* Standard local interrupt assignments */
- mptable_lintsrc(mc, bus_isa);
-
- /* There is no extension information... */
-
- /* Compute the checksums */
- return mptable_finalize(mc);
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
- void *v;
- v = smp_write_floating_table(addr, 0);
- return (unsigned long)smp_write_config_table(v);
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig/romstage.c b/src/mainboard/supermicro/x6dhr_ig/romstage.c
deleted file mode 100644
index 08b0ccd..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/romstage.c
+++ /dev/null
@@ -1,106 +0,0 @@
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include "southbridge/intel/i82801ex/early_smbus.c"
-#include "northbridge/intel/e7520/raminit.h"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "debug.c"
-#include "watchdog.c"
-#include "southbridge/intel/i82801ex/reset.c"
-#include "superio/winbond/w83627hf/early_serial.c"
-#include <superio/winbond/w83627hf/w83627hf.h>
-#include "northbridge/intel/e7520/memory_initialized.c"
-#include "cpu/x86/bist.h"
-#include <spd.h>
-
-#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2)
-#define DUMMY_DEV PNP_DEV(0x2e, 0)
-
-#define DEVPRES_CONFIG ( \
- DEVPRES_D0F0 | \
- DEVPRES_D1F0 | \
- DEVPRES_D2F0 | \
- DEVPRES_D3F0 | \
- DEVPRES_D4F0 | \
- DEVPRES_D6F0 | \
- 0 )
-#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-
-static void mch_reset(void) {}
-static void mainboard_set_e7520_pll(unsigned bits) {}
-static void mainboard_set_e7520_leds(void) {}
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/e7520/raminit.c"
-#include "lib/generic_sdram.c"
-#include "arch/x86/lib/stages.c"
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- static const struct mem_controller mch[] = {
- {
- .node_id = 0,
- .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
- .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
- }
- };
-
- if (bist == 0) {
- /* Skip this if there was a built in self test failure */
- early_mtrr_init();
- if (memory_initialized())
- skip_romstage();
- }
-
- w83627hf_set_clksel_48(DUMMY_DEV);
- w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
-
- /* Halt if there was a built in self test failure */
-// report_bist_failure(bist);
-
- /* MOVE ME TO A BETTER LOCATION !!! */
- /* config LPC decode for flash memory access */
- device_t dev;
- dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
- if (dev == PCI_DEV_INVALID)
- die("Missing ich5?");
- pci_write_config32(dev, 0xe8, 0x00000000);
- pci_write_config8(dev, 0xf0, 0x00);
-
-#if 0
- display_cpuid_update_microcode();
- print_pci_devices();
-#endif
-#if 1
- enable_smbus();
-#endif
-#if 0
-// dump_spd_registers(&cpu[0]);
- int i;
- for(i = 0; i < 1; i++)
- dump_spd_registers();
-#endif
- disable_watchdogs();
-// dump_ipmi_registers();
- mainboard_set_e7520_leds();
- sdram_initialize(ARRAY_SIZE(mch), mch);
-#if 1
- dump_pci_devices();
-#endif
-#if 0
- dump_pci_device(PCI_DEV(0, 0x00, 0));
- dump_bar14(PCI_DEV(0, 0x00, 0));
-#endif
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig/watchdog.c b/src/mainboard/supermicro/x6dhr_ig/watchdog.c
deleted file mode 100644
index a451c32..0000000
--- a/src/mainboard/supermicro/x6dhr_ig/watchdog.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <device/pnp_def.h>
-
-#define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
-#define NSC_WDBASE 0x600
-#define ICH5_WDBASE 0x400
-#define ICH5_GPIOBASE 0x500
-
-static void disable_sio_watchdog(device_t dev)
-{
-#if 0
- /* FIXME move me somewhere more appropriate */
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 1);
- pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE);
- /* disable the sio watchdog */
- outb(0, NSC_WDBASE + 0);
- pnp_set_enable(dev, 0);
-#endif
-}
-
-static void disable_ich5_watchdog(void)
-{
- /* FIXME move me somewhere more appropriate */
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing ich5?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 10);
- pci_write_config16(dev, 0x04, value);
-
- /* Set and enable acpibase */
- pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
- pci_write_config8(dev, 0x44, 0x10);
- base = ICH5_WDBASE + 0x60;
-
- /* Set bit 11 in TCO1_CNT */
- value = inw(base + 0x08);
- value |= 1 << 11;
- outw(value, base + 0x08);
-
- /* Clear TCO timeout status */
- outw(0x0008, base + 0x04);
- outw(0x0002, base + 0x06);
-}
-
-static void disable_jarell_frb3(void)
-{
-#if 0
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing ich5?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 0);
- pci_write_config16(dev, 0x04, value);
-
- /* Set gpio base */
- pci_write_config32(dev, 0x58, ICH5_GPIOBASE | 1);
- base = ICH5_GPIOBASE;
-
- /* Enable GPIO Bar */
- value = pci_read_config32(dev, 0x5c);
- value |= 0x10;
- pci_write_config32(dev, 0x5c, value);
-
- /* Configure GPIO 48 and 40 as GPIO */
- value = inl(base + 0x30);
- value |= (1 << 16) | ( 1 << 8);
- outl(value, base + 0x30);
-
- /* Configure GPIO 48 as Output */
- value = inl(base + 0x34);
- value &= ~(1 << 16);
- outl(value, base + 0x34);
-
- /* Toggle GPIO 48 high to low */
- value = inl(base + 0x38);
- value |= (1 << 16);
- outl(value, base + 0x38);
- value &= ~(1 << 16);
- outl(value, base + 0x38);
-#endif
-}
-
-static void disable_watchdogs(void)
-{
-// disable_sio_watchdog(NSC_WD_DEV);
- disable_ich5_watchdog();
-// disable_jarell_frb3();
- print_debug("Watchdogs disabled\n");
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/Kconfig b/src/mainboard/supermicro/x6dhr_ig2/Kconfig
deleted file mode 100644
index 9c8e4a6..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/Kconfig
+++ /dev/null
@@ -1,33 +0,0 @@
-if BOARD_SUPERMICRO_X6DHR_IG2
-
-config BOARD_SPECIFIC_OPTIONS # dummy
- def_bool y
- select CPU_INTEL_SOCKET_MPGA604
- select NORTHBRIDGE_INTEL_E7520
- select SOUTHBRIDGE_INTEL_I82801EX
- select SOUTHBRIDGE_INTEL_PXHD
- select SUPERIO_WINBOND_W83627HF
- select ROMCC
- select HAVE_OPTION_TABLE
- select HAVE_PIRQ_TABLE
- select HAVE_MP_TABLE
- select USE_WATCHDOG_ON_BOOT
- select BOARD_ROMSIZE_KB_1024
-
-config MAINBOARD_DIR
- string
- default supermicro/x6dhr_ig2
-
-config MAINBOARD_PART_NUMBER
- string
- default "X6DHR-iG2"
-
-config MAX_CPUS
- int
- default 4
-
-config IRQ_SLOT_COUNT
- int
- default 15
-
-endif # BOARD_SUPERMICRO_X6DHR_IG2
diff --git a/src/mainboard/supermicro/x6dhr_ig2/board_info.txt b/src/mainboard/supermicro/x6dhr_ig2/board_info.txt
deleted file mode 100644
index 7b89c5a..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/board_info.txt
+++ /dev/null
@@ -1,2 +0,0 @@
-Category: server
-Board URL: http://www.supermicro.com/products/motherboard/Xeon800/E7520/X6DHR-iG2.cfm
diff --git a/src/mainboard/supermicro/x6dhr_ig2/cmos.layout b/src/mainboard/supermicro/x6dhr_ig2/cmos.layout
deleted file mode 100644
index 635555e..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/cmos.layout
+++ /dev/null
@@ -1,78 +0,0 @@
-entries
-
-#start-bit length config config-ID name
-#0 8 r 0 seconds
-#8 8 r 0 alarm_seconds
-#16 8 r 0 minutes
-#24 8 r 0 alarm_minutes
-#32 8 r 0 hours
-#40 8 r 0 alarm_hours
-#48 8 r 0 day_of_week
-#56 8 r 0 day_of_month
-#64 8 r 0 month
-#72 8 r 0 year
-#80 4 r 0 rate_select
-#84 3 r 0 REF_Clock
-#87 1 r 0 UIP
-#88 1 r 0 auto_switch_DST
-#89 1 r 0 24_hour_mode
-#90 1 r 0 binary_values_enable
-#91 1 r 0 square-wave_out_enable
-#92 1 r 0 update_finished_enable
-#93 1 r 0 alarm_interrupt_enable
-#94 1 r 0 periodic_interrupt_enable
-#95 1 r 0 disable_clock_updates
-#96 288 r 0 temporary_filler
-0 384 r 0 reserved_memory
-384 1 e 4 boot_option
-385 1 e 4 last_boot
-386 1 e 1 ECC_memory
-388 4 r 0 reboot_bits
-392 3 e 5 baud_rate
-395 1 e 2 hyper_threading
-400 1 e 1 power_on_after_fail
-412 4 e 6 debug_level
-416 4 e 7 boot_first
-420 4 e 7 boot_second
-424 4 e 7 boot_third
-428 4 h 0 boot_index
-432 8 h 0 boot_countdown
-728 256 h 0 user_data
-984 16 h 0 check_sum
-# Reserve the extended AMD configuration registers
-1000 24 r 0 amd_reserved
-
-
-
-enumerations
-
-#ID value text
-1 0 Disable
-1 1 Enable
-2 0 Enable
-2 1 Disable
-4 0 Fallback
-4 1 Normal
-5 0 115200
-5 1 57600
-5 2 38400
-5 3 19200
-5 4 9600
-5 5 4800
-5 6 2400
-5 7 1200
-6 6 Notice
-6 7 Info
-6 8 Debug
-6 9 Spew
-7 0 Network
-7 1 HDD
-7 2 Floppy
-7 8 Fallback_Network
-7 9 Fallback_HDD
-7 10 Fallback_Floppy
-#7 3 ROM
-
-checksums
-
-checksum 392 983 984
diff --git a/src/mainboard/supermicro/x6dhr_ig2/debug.c b/src/mainboard/supermicro/x6dhr_ig2/debug.c
deleted file mode 100644
index 93199d7..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/debug.c
+++ /dev/null
@@ -1,328 +0,0 @@
-#include <spd.h>
-
-static void print_reg(unsigned char index)
-{
- unsigned char data;
-
- outb(index, 0x2e);
- data = inb(0x2f);
- print_debug("0x");
- print_debug_hex8(index);
- print_debug(": 0x");
- print_debug_hex8(data);
- print_debug("\n");
- return;
-}
-
-static void xbus_en(void)
-{
- /* select the XBUS function in the SIO */
- outb(0x07, 0x2e);
- outb(0x0f, 0x2f);
- outb(0x30, 0x2e);
- outb(0x01, 0x2f);
- return;
-}
-
-static void setup_func(unsigned char func)
-{
- /* select the function in the SIO */
- outb(0x07, 0x2e);
- outb(func, 0x2f);
- /* print out the regs */
- print_reg(0x30);
- print_reg(0x60);
- print_reg(0x61);
- print_reg(0x62);
- print_reg(0x63);
- print_reg(0x70);
- print_reg(0x71);
- print_reg(0x74);
- print_reg(0x75);
- return;
-}
-
-static void siodump(void)
-{
- int i;
- unsigned char data;
-
- print_debug("\n*** SERVER I/O REGISTERS ***\n");
- for (i=0x10; i<=0x2d; i++) {
- print_reg((unsigned char)i);
- }
-#if 0
- print_debug("\n*** XBUS REGISTERS ***\n");
- setup_func(0x0f);
- for (i=0xf0; i<=0xff; i++) {
- print_reg((unsigned char)i);
- }
-
- print_debug("\n*** SERIAL 1 CONFIG REGISTERS ***\n");
- setup_func(0x03);
- print_reg(0xf0);
-
- print_debug("\n*** SERIAL 2 CONFIG REGISTERS ***\n");
- setup_func(0x02);
- print_reg(0xf0);
-
-#endif
- print_debug("\n*** GPIO REGISTERS ***\n");
- setup_func(0x07);
- for (i=0xf0; i<=0xf8; i++) {
- print_reg((unsigned char)i);
- }
- print_debug("\n*** GPIO VALUES ***\n");
- data = inb(0x68a);
- print_debug("\nGPDO 4: 0x");
- print_debug_hex8(data);
- data = inb(0x68b);
- print_debug("\nGPDI 4: 0x");
- print_debug_hex8(data);
- print_debug("\n");
-
-#if 0
-
- print_debug("\n*** WATCHDOG TIMER REGISTERS ***\n");
- setup_func(0x0a);
- print_reg(0xf0);
-
- print_debug("\n*** FAN CONTROL REGISTERS ***\n");
- setup_func(0x09);
- print_reg(0xf0);
- print_reg(0xf1);
-
- print_debug("\n*** RTC REGISTERS ***\n");
- setup_func(0x10);
- print_reg(0xf0);
- print_reg(0xf1);
- print_reg(0xf3);
- print_reg(0xf6);
- print_reg(0xf7);
- print_reg(0xfe);
- print_reg(0xff);
-
- print_debug("\n*** HEALTH MONITORING & CONTROL REGISTERS ***\n");
- setup_func(0x14);
- print_reg(0xf0);
-#endif
- return;
-}
-
-static void print_debug_pci_dev(unsigned dev)
-{
- print_debug("PCI: ");
- print_debug_hex8((dev >> 16) & 0xff);
- print_debug_char(':');
- print_debug_hex8((dev >> 11) & 0x1f);
- print_debug_char('.');
- print_debug_hex8((dev >> 8) & 7);
-}
-
-static void print_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- print_debug_pci_dev(dev);
- print_debug("\n");
- }
-}
-
-static void dump_pci_device(unsigned dev)
-{
- int i;
- print_debug_pci_dev(dev);
- print_debug("\n");
-
- for(i = 0; i <= 255; i++) {
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
- print_debug_char(' ');
- print_debug_hex8(val);
- if ((i & 0x0f) == 0x0f) {
- print_debug("\n");
- }
- }
-}
-
-static void dump_bar14(unsigned dev)
-{
- int i;
- unsigned long bar;
-
- print_debug("BAR 14 Dump\n");
-
- bar = pci_read_config32(dev, 0x14);
- for(i = 0; i <= 0x300; i+=4) {
-#if 0
- unsigned char val;
- if ((i & 0x0f) == 0) {
- print_debug_hex8(i);
- print_debug_char(':');
- }
- val = pci_read_config8(dev, i);
-#endif
- if((i%4)==0) {
- print_debug("\n");
- print_debug_hex16(i);
- print_debug_char(' ');
- }
- print_debug_hex32(read32(bar + i));
- print_debug_char(' ');
- }
- print_debug("\n");
-}
-
-static void dump_pci_devices(void)
-{
- device_t dev;
- for(dev = PCI_DEV(0, 0, 0);
- dev <= PCI_DEV(0, 0x1f, 0x7);
- dev += PCI_DEV(0,0,1)) {
- uint32_t id;
- id = pci_read_config32(dev, PCI_VENDOR_ID);
- if (((id & 0xffff) == 0x0000) || ((id & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0xffff) ||
- (((id >> 16) & 0xffff) == 0x0000)) {
- continue;
- }
- dump_pci_device(dev);
- }
-}
-
-#if 0
-static void dump_spd_registers(const struct mem_controller *ctrl)
-{
- int i;
- print_debug("\n");
- for(i = 0; i < 4; i++) {
- unsigned device;
- device = ctrl->channel0[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".0: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- device = ctrl->channel1[i];
- if (device) {
- int j;
- print_debug("dimm: ");
- print_debug_hex8(i);
- print_debug(".1: ");
- print_debug_hex8(device);
- for(j = 0; j < 256; j++) {
- int status;
- unsigned char byte;
- if ((j & 0xf) == 0) {
- print_debug("\n");
- print_debug_hex8(j);
- print_debug(": ");
- }
- status = smbus_read_byte(device, j);
- if (status < 0) {
- print_debug("bad device\n");
- break;
- }
- byte = status & 0xff;
- print_debug_hex8(byte);
- print_debug_char(' ');
- }
- print_debug("\n");
- }
- }
-}
-#endif
-
-void dump_spd_registers(void)
-{
- unsigned device;
- device = DIMM0;
- while(device <= DIMM7) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("dimm ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 256) ; i++) {
- unsigned char byte;
- if ((i % 16) == 0) {
- print_debug("\n");
- print_debug_hex8(i);
- print_debug(": ");
- }
- status = smbus_read_byte(device, i);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
-
-void dump_ipmi_registers(void)
-{
- unsigned device;
- device = 0x42;
- while(device <= 0x42) {
- int status = 0;
- int i;
- print_debug("\n");
- print_debug("ipmi ");
- print_debug_hex8(device);
-
- for(i = 0; (i < 8) ; i++) {
- unsigned char byte;
- status = smbus_read_byte(device, 2);
- if (status < 0) {
- print_debug("bad device: ");
- print_debug_hex8(-status);
- print_debug("\n");
- break;
- }
- print_debug_hex8(status);
- print_debug_char(' ');
- }
- device++;
- print_debug("\n");
- }
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb b/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
deleted file mode 100644
index ca8650b..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/devicetree.cb
+++ /dev/null
@@ -1,76 +0,0 @@
-chip northbridge/intel/e7520 # mch
- device domain 0 on
- subsystemid 0x15d9 0x5580 inherit
- chip southbridge/intel/i82801ex # i82801er
- # USB ports
- device pci 1d.0 on end
- device pci 1d.1 on end
- device pci 1d.2 on end
- device pci 1d.3 on end
- device pci 1d.7 on end
-
- # -> Bridge
- device pci 1e.0 on end
-
- # -> ISA
- device pci 1f.0 on
- chip superio/winbond/w83627hf
- device pnp 2e.0 off end
- device pnp 2e.2 on
- io 0x60 = 0x3f8
- irq 0x70 = 4
- end
- device pnp 2e.3 on
- io 0x60 = 0x2f8
- irq 0x70 = 3
- end
- device pnp 2e.4 off end
- device pnp 2e.5 off end
- device pnp 2e.6 off end
- device pnp 2e.7 off end
- device pnp 2e.9 off end
- device pnp 2e.a on end
- device pnp 2e.b off end
- end
- end
- # -> IDE
- device pci 1f.1 on end
- # -> SATA
- device pci 1f.2 on end
- device pci 1f.3 on end
-
- register "pirq_a_d" = "0x0b070a05"
- register "pirq_e_h" = "0x0a808080"
- end
- device pci 00.0 on end
- device pci 00.1 on end
- device pci 01.0 on end
- device pci 02.0 on
- chip southbridge/intel/pxhd # pxhd1
- # Bus bridges and ioapics usually bus 1
- device pci 0.0 on
- # On board gig e1000
- chip drivers/generic/generic
- device pci 03.0 on end
- device pci 03.1 on end
- end
- end
- device pci 0.1 on end
- device pci 0.2 on end
- device pci 0.3 on end
- end
- end
- device pci 04.0 on end
- device pci 06.0 on end
- end
- device cpu_cluster 0 on
- chip cpu/intel/socket_mPGA604 # cpu 0
- device lapic 0 on end
- end
- chip cpu/intel/socket_mPGA604 # cpu 1
- device lapic 6 on end
- end
- end
- register "intrline" = "0x00070105"
-end
-
diff --git a/src/mainboard/supermicro/x6dhr_ig2/irq_tables.c b/src/mainboard/supermicro/x6dhr_ig2/irq_tables.c
deleted file mode 100644
index 72f4125..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/irq_tables.c
+++ /dev/null
@@ -1,39 +0,0 @@
-/* PCI: Interrupt Routing Table found at 0x4010f000 size = 176 */
-
-#include <arch/pirq_routing.h>
-
-static const struct irq_routing_table intel_irq_routing_table = {
- 0x52495024, /* u32 signature */
- 0x0100, /* u16 version */
- 32 + 16 * CONFIG_IRQ_SLOT_COUNT, /* u16 Table size 32+(16*devices) */
- 0x00, /* u8 Bus 0 */
- 0xf8, /* u8 Device 1, Function 0 */
- 0x0000, /* u16 reserve IRQ for PCI */
- 0x8086, /* u16 Vendor */
- 0x24d0, /* Device ID */
- 0x00000000, /* u32 miniport_data */
- { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }, /* u8 rfu[11] */
- 0xc4, /* u8 checksum - mod 256 checksum must give zero */
- { /* bus, devfn, {link, bitmap}, {link, bitmap}, {link, bitmap}, {link, bitmap}, slot, rfu */
- {0x00, (0x01<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x02<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x03<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x04<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x06<<3)|0, {{0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|0, {{0x60, 0xdcf8}, {0x63, 0xdcf8}, {0x62, 0xdc78}, {0x6b, 0xdcf8}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|1, {{0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|2, {{0x62, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1d<<3)|3, {{0x60, 0xdcf8}, {0x60, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|0, {{0x62, 0xdc78}, {0x61, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x00, (0x1f<<3)|1, {{0x62, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|0, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x04, (0x02<<3)|1, {{0x62, 0xdc78}, {0x63, 0xdcf8}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x00, 0x00},
- {0x06, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x06, 0x00},
- {0x07, (0x02<<3)|0, {{0x60, 0xdc78}, {0x00, 0x0000}, {0x00, 0x0000}, {0x00, 0x0000}}, 0x07, 0x00}
- }
-};
-
-unsigned long write_pirq_routing_table(unsigned long addr)
-{
- return copy_pirq_routing_table(addr, &intel_irq_routing_table);
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/mptable.c b/src/mainboard/supermicro/x6dhr_ig2/mptable.c
deleted file mode 100644
index b5ba6b1..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/mptable.c
+++ /dev/null
@@ -1,168 +0,0 @@
-#include <console/console.h>
-#include <arch/smp/mpspec.h>
-#include <arch/ioapic.h>
-#include <device/pci.h>
-#include <string.h>
-#include <stdint.h>
-
-static void *smp_write_config_table(void *v)
-{
- struct mp_config_table *mc;
- int bus_isa;
- unsigned char bus_pxhd_1;
- unsigned char bus_pxhd_2;
- unsigned char bus_pxhd_3;
- unsigned char bus_pxhd_4;
- unsigned char bus_ich5r_1;
-
- mc = (void *)(((char *)v) + SMP_FLOATING_TABLE_LEN);
-
- mptable_init(mc, LOCAL_APIC_ADDR);
-
- smp_write_processors(mc);
-
- {
- device_t dev;
-
- /* ich5r */
- dev = dev_find_slot(0, PCI_DEVFN(0x1e,0));
- if (dev) {
- bus_ich5r_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:1e.0, using defaults\n");
-
- bus_ich5r_1 = 7;
- }
- /* pxhd-1 */
- dev = dev_find_slot(1, PCI_DEVFN(0x0,0));
- if (dev) {
- bus_pxhd_1 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.0, using defaults\n");
-
- bus_pxhd_1 = 2;
- }
- /* pxhd-2 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,2));
- if (dev) {
- bus_pxhd_2 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 1:00.2, using defaults\n");
-
- bus_pxhd_2 = 3;
- }
-
- /* pxhd-3 */
- dev = dev_find_slot(0, PCI_DEVFN(0x4,0));
- if (dev) {
- bus_pxhd_3 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:04.0, using defaults\n");
-
- bus_pxhd_3 = 5;
- }
- /* pxhd-4 */
- dev = dev_find_slot(0, PCI_DEVFN(0x06,0));
- if (dev) {
- bus_pxhd_4 = pci_read_config8(dev, PCI_SECONDARY_BUS);
-
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find PCI 0:06.0, using defaults\n");
-
- bus_pxhd_4 = 6;
- }
-
- }
-
- mptable_write_buses(mc, NULL, &bus_isa);
-
- /* IOAPIC handling */
-
- smp_write_ioapic(mc, 2, 0x20, IO_APIC_ADDR);
- {
- struct resource *res;
- device_t dev;
- /* pxhd apic 3 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,1));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x03, 0x20, res->base);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.1\n");
- }
- /* pxhd apic 4 */
- dev = dev_find_slot(1, PCI_DEVFN(0x00,3));
- if (dev) {
- res = find_resource(dev, PCI_BASE_ADDRESS_0);
- if (res) {
- smp_write_ioapic(mc, 0x04, 0x20, res->base);
- }
- }
- else {
- printk(BIOS_DEBUG, "ERROR - could not find IOAPIC PCI 1:00.3\n");
- }
- }
- mptable_add_isa_interrupts(mc, bus_isa, 0x2, 0);
-
- /* ISA backward compatibility interrupts */
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x74, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x76, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x77, 0x02, 0x17);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x75, 0x02, 0x13);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x74, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7c, 0x02, 0x12);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- 0x00, 0x7d, 0x02, 0x11);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_1, 0x08, 0x03, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_1, 0x0c, 0x03, 0x06);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_1, 0x0d, 0x03, 0x07);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_2, 0x08, 0x04, 0x00);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_ich5r_1, 0x04, 0x02, 0x10);
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- bus_pxhd_4, 0x00, 0x02, 0x10);
-#if 0
- smp_write_intsrc(mc, mp_INT, MP_IRQ_TRIGGER_LEVEL|MP_IRQ_POLARITY_LOW,
- (bus_isa - 1), 0x04, 0x02, 0x10);
-#endif
- /* Standard local interrupt assignments */
-#if 0
- smp_write_lintsrc(mc, mp_ExtINT, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x00, MP_APIC_ALL, 0x00);
-#endif
- smp_write_lintsrc(mc, mp_NMI, MP_IRQ_TRIGGER_EDGE|MP_IRQ_POLARITY_HIGH,
- bus_isa, 0x00, MP_APIC_ALL, 0x01);
-
- /* There is no extension information... */
-
- /* Compute the checksums */
- return mptable_finalize(mc);
-}
-
-unsigned long write_smp_table(unsigned long addr)
-{
- void *v;
- v = smp_write_floating_table(addr, 0);
- return (unsigned long)smp_write_config_table(v);
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/romstage.c b/src/mainboard/supermicro/x6dhr_ig2/romstage.c
deleted file mode 100644
index dfe0da2..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/romstage.c
+++ /dev/null
@@ -1,104 +0,0 @@
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <stdlib.h>
-#include <console/console.h>
-#include "southbridge/intel/i82801ex/early_smbus.c"
-#include "northbridge/intel/e7520/raminit.h"
-#include "cpu/x86/lapic/boot_cpu.c"
-#include "cpu/x86/mtrr/earlymtrr.c"
-#include "debug.c"
-#include "watchdog.c"
-#include "southbridge/intel/i82801ex/reset.c"
-#include "superio/winbond/w83627hf/early_serial.c"
-#include <superio/winbond/w83627hf/w83627hf.h>
-#include "northbridge/intel/e7520/memory_initialized.c"
-#include "cpu/x86/bist.h"
-#include <spd.h>
-
-#define CONSOLE_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP1)
-#define HIDDEN_SERIAL_DEV PNP_DEV(0x2e, W83627HF_SP2)
-#define DUMMY_DEV PNP_DEV(0x2e, 0)
-
-#define DEVPRES_CONFIG ( \
- DEVPRES_D0F0 | \
- DEVPRES_D1F0 | \
- DEVPRES_D2F0 | \
- DEVPRES_D3F0 | \
- DEVPRES_D4F0 | \
- DEVPRES_D6F0 | \
- 0 )
-#define DEVPRES1_CONFIG (DEVPRES1_D0F1 | DEVPRES1_D8F0)
-
-static void mch_reset(void) {}
-static void mainboard_set_e7520_pll(unsigned bits) {}
-static void mainboard_set_e7520_leds(void) {}
-
-static inline int spd_read_byte(unsigned device, unsigned address)
-{
- return smbus_read_byte(device, address);
-}
-
-#include "northbridge/intel/e7520/raminit.c"
-#include "lib/generic_sdram.c"
-#include "arch/x86/lib/stages.c"
-
-#include <cpu/intel/romstage.h>
-static void main(unsigned long bist)
-{
- static const struct mem_controller mch[] = {
- {
- .node_id = 0,
- .channel0 = {DIMM3, DIMM2, DIMM1, DIMM0, },
- .channel1 = {DIMM7, DIMM6, DIMM5, DIMM4, },
- }
- };
-
- if (bist == 0) {
- /* Skip this if there was a built in self test failure */
- early_mtrr_init();
- if (memory_initialized())
- skip_romstage();
- }
-
- w83627hf_set_clksel_48(DUMMY_DEV);
- w83627hf_enable_serial(CONSOLE_SERIAL_DEV, CONFIG_TTYS0_BASE);
- console_init();
-
- /* Halt if there was a built in self test failure */
-// report_bist_failure(bist);
-
- /* MOVE ME TO A BETTER LOCATION !!! */
- /* config LPC decode for flash memory access */
- device_t dev;
- dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
- if (dev == PCI_DEV_INVALID)
- die("Missing ich5?");
- pci_write_config32(dev, 0xe8, 0x00000000);
- pci_write_config8(dev, 0xf0, 0x00);
-
-#if 0
- display_cpuid_update_microcode();
- print_pci_devices();
-#endif
-#if 1
- enable_smbus();
-#endif
-#if 0
-// dump_spd_registers(&cpu[0]);
- int i;
- for(i = 0; i < 1; i++)
- dump_spd_registers();
-#endif
- disable_watchdogs();
-// dump_ipmi_registers();
- mainboard_set_e7520_leds();
- sdram_initialize(ARRAY_SIZE(mch), mch);
-#if 0
- dump_pci_devices();
- dump_pci_device(PCI_DEV(0, 0x00, 0));
- dump_bar14(PCI_DEV(0, 0x00, 0));
-#endif
-}
diff --git a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c b/src/mainboard/supermicro/x6dhr_ig2/watchdog.c
deleted file mode 100644
index a451c32..0000000
--- a/src/mainboard/supermicro/x6dhr_ig2/watchdog.c
+++ /dev/null
@@ -1,98 +0,0 @@
-#include <device/pnp_def.h>
-
-#define NSC_WD_DEV PNP_DEV(0x2e, 0xa)
-#define NSC_WDBASE 0x600
-#define ICH5_WDBASE 0x400
-#define ICH5_GPIOBASE 0x500
-
-static void disable_sio_watchdog(device_t dev)
-{
-#if 0
- /* FIXME move me somewhere more appropriate */
- pnp_set_logical_device(dev);
- pnp_set_enable(dev, 1);
- pnp_set_iobase(dev, PNP_IDX_IO0, NSC_WDBASE);
- /* disable the sio watchdog */
- outb(0, NSC_WDBASE + 0);
- pnp_set_enable(dev, 0);
-#endif
-}
-
-static void disable_ich5_watchdog(void)
-{
- /* FIXME move me somewhere more appropriate */
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing ich5?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 10);
- pci_write_config16(dev, 0x04, value);
-
- /* Set and enable acpibase */
- pci_write_config32(dev, 0x40, ICH5_WDBASE | 1);
- pci_write_config8(dev, 0x44, 0x10);
- base = ICH5_WDBASE + 0x60;
-
- /* Set bit 11 in TCO1_CNT */
- value = inw(base + 0x08);
- value |= 1 << 11;
- outw(value, base + 0x08);
-
- /* Clear TCO timeout status */
- outw(0x0008, base + 0x04);
- outw(0x0002, base + 0x06);
-}
-
-static void disable_jarell_frb3(void)
-{
-#if 0
- device_t dev;
- unsigned long value, base;
- dev = pci_locate_device(PCI_ID(0x8086, 0x24d0), 0);
- if (dev == PCI_DEV_INVALID) {
- die("Missing ich5?");
- }
- /* Enable I/O space */
- value = pci_read_config16(dev, 0x04);
- value |= (1 << 0);
- pci_write_config16(dev, 0x04, value);
-
- /* Set gpio base */
- pci_write_config32(dev, 0x58, ICH5_GPIOBASE | 1);
- base = ICH5_GPIOBASE;
-
- /* Enable GPIO Bar */
- value = pci_read_config32(dev, 0x5c);
- value |= 0x10;
- pci_write_config32(dev, 0x5c, value);
-
- /* Configure GPIO 48 and 40 as GPIO */
- value = inl(base + 0x30);
- value |= (1 << 16) | ( 1 << 8);
- outl(value, base + 0x30);
-
- /* Configure GPIO 48 as Output */
- value = inl(base + 0x34);
- value &= ~(1 << 16);
- outl(value, base + 0x34);
-
- /* Toggle GPIO 48 high to low */
- value = inl(base + 0x38);
- value |= (1 << 16);
- outl(value, base + 0x38);
- value &= ~(1 << 16);
- outl(value, base + 0x38);
-#endif
-}
-
-static void disable_watchdogs(void)
-{
-// disable_sio_watchdog(NSC_WD_DEV);
- disable_ich5_watchdog();
-// disable_jarell_frb3();
- print_debug("Watchdogs disabled\n");
-}
More information about the coreboot-gerrit
mailing list