[coreboot-gerrit] New patch to review for coreboot: 14108f4 northbridge/via/vx800/dev_init.c: Use bitwise and over logical
Edward O'Callaghan (eocallaghan@alterapraxis.com)
gerrit at coreboot.org
Wed Nov 12 03:07:01 CET 2014
Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7442
-gerrit
commit 14108f49e1e69658268bef793ffe52f76f663237
Author: Edward O'Callaghan <eocallaghan at alterapraxis.com>
Date: Wed Nov 12 13:05:11 2014 +1100
northbridge/via/vx800/dev_init.c: Use bitwise and over logical
Use bitwise and over logical and with constant operand while
masking off bits.
Change-Id: Ie3613952ebbfacc9c5f1ca6c88e564fe96820b8c
Found-by: Clang
Signed-off-by: Edward O'Callaghan <eocallaghan at alterapraxis.com>
---
src/northbridge/via/vx800/dev_init.c | 8 ++++----
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/src/northbridge/via/vx800/dev_init.c b/src/northbridge/via/vx800/dev_init.c
index e3743e0..59f114d 100644
--- a/src/northbridge/via/vx800/dev_init.c
+++ b/src/northbridge/via/vx800/dev_init.c
@@ -1134,10 +1134,10 @@ CB_STATUS VerifyChc(void)
Data |= 0x10;
pci_write_config8(MEMCTRL, 0xdb, Data);
- Data = (u8) (row && 0xFF);
+ Data = (u8) (row & 0xFF);
pci_write_config8(MEMCTRL, 0xf8, Data);
- Data = (u8) ((row && 0xFF) >> 8);
+ Data = (u8) ((row & 0xFF) >> 8);
pci_write_config8(MEMCTRL, 0xf9, Data);
/* Issue active cycle. */
@@ -1214,10 +1214,10 @@ CB_STATUS VerifyChc(void)
Data |= 0x10;
pci_write_config8(MEMCTRL, 0xdb, Data);
- Data = (u8) (row && 0xFF);
+ Data = (u8) (row & 0xFF);
pci_write_config8(MEMCTRL, 0xf8, Data);
- Data = (u8) ((row && 0xFF) >> 8);
+ Data = (u8) ((row & 0xFF) >> 8);
pci_write_config8(MEMCTRL, 0xf9, Data);
// issue active cycle
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