[coreboot-gerrit] Patch merged into coreboot/master: b8ef4c9 usbdebug: Reduce bus reset delays

gerrit at coreboot.org gerrit at coreboot.org
Sun Nov 23 20:36:18 CET 2014


the following patch was just integrated into master:
commit b8ef4c9a840ebf1549694db9967f101ab2211db6
Author: Kyösti Mälkki <kyosti.malkki at gmail.com>
Date:   Mon Aug 12 21:35:20 2013 +0300

    usbdebug: Reduce bus reset delays
    
    According to EHCI specification, host controller software stops
    the USB Reset condition by writing PORT_RESET=0. Software then
    poll-waits this bit until controller hardware has completed USB
    Reset sequence and read returns with PORT_RESET==0.
    
    Change-Id: I6033c4d904c2af9eb16f5f3c1eb825776648cc1d
    Signed-off-by: Kyösti Mälkki <kyosti.malkki at gmail.com>
    Reviewed-on: http://review.coreboot.org/3863
    Reviewed-by: Nico Huber <nico.h at gmx.de>
    Tested-by: build bot (Jenkins)


See http://review.coreboot.org/3863 for details.

-gerrit



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