[coreboot-gerrit] Patch merged into coreboot/master: bf9d6a8 baytrail: Add padding to the end of device_nvs to match ACPI

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit bf9d6a856788f7bae7c3732b1761adb99ac3914f
Author: Scott Radcliffe <sradcliffe at microind.com>
Date:   Fri Oct 10 16:15:01 2014 -0400

    baytrail: Add padding to the end of device_nvs to match ACPI
    
    ACPI globalnvs.asl expects the gnvs memory area size to be 0x2000.
    Padding has been added to device_nvs struct to reserve the full
    0x2000 bytes for gnvs usage.
    
    No known issues are caused by having the GNVS area shorter than
    what ACPI thinks. Since there's nothing defined in this area,
    O/S shouldn't try to access it. Only problem might be if O/S
    notices the SSDT is located within the GNVS defined area.
    
    I verified that the next table written to memory (SSDT) is 0x2000
    past GNVS start using a custom-designed Baytrail-I motherboard
    based on the Intel Bayley Bay CRB.
    
    Change-Id: I9792954c7a3403eba6f37d7e53ea4a9ed3a2e4ac
    Signed-off-by: Scott Radcliffe <sradcliffe at microind.com>
    Reviewed-on: http://review.coreboot.org/7039
    Tested-by: build bot (Jenkins)
    Reviewed-by: Paul Menzel <paulepanter at users.sourceforge.net>
    Reviewed-by: Marc Jones <marc.jones at se-eng.com>


See http://review.coreboot.org/7039 for details.

-gerrit