[coreboot-gerrit] Patch set updated for coreboot: e406234 bd82x6x/sata: Fix AHCI mode setting for max 6 ports on first controller

[Edward O'Callaghan (eocallaghan@alterapraxis.com)]

Edward O'Callaghan (eocallaghan at alterapraxis.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/7172

-gerrit

commit e406234948d0f8a3b398d2fd2fc6581a47a40f58
Author: Damien Zammit <damien at zamaudio.com>
Date:   Thu Oct 23 13:21:45 2014 +1100

    bd82x6x/sata: Fix AHCI mode setting for max 6 ports on first controller
    
    According to the Intel datasheet, 2 flags must be set when in AHCI mode.
    This is now fixed.  There is an alternative setting to enable max 2 ports
    on first controller and 4 on the second controller, but this patch hardcodes
    max 6 sata ports on the first controller.
    Tested and working on new Intel desktop mainboard port.
    
    Change-Id: I825c15d329b2d5960534b1f01843e0df3ace5317
    Signed-off-by: Damien Zammit <damien at zamaudio.com>
---
 src/southbridge/intel/bd82x6x/sata.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/southbridge/intel/bd82x6x/sata.c b/src/southbridge/intel/bd82x6x/sata.c
index cb5699e..65931e1 100644
--- a/src/southbridge/intel/bd82x6x/sata.c
+++ b/src/southbridge/intel/bd82x6x/sata.c
@@ -89,6 +89,10 @@ static void sata_init(struct device *dev)
 		reg32 = SIG_MODE_PRI_NORMAL | FAST_PCB1 | FAST_PCB0 | PCB1 | PCB0;
 		pci_write_config32(dev, IDE_CONFIG, reg32);
 
+		/* Set AHCI mode with max 6 ports on first controller */
+		reg16 = 0x0050;
+		pci_write_config16(dev, 0x90, reg16);
+
 		/* for AHCI, Port Enable is managed in memory mapped space */
 		reg16 = pci_read_config16(dev, 0x92);
 		reg16 &= ~0x3f; /* 6 ports SKU + ORM */