[coreboot-gerrit] New patch to review for coreboot: kunimitsu sklrvp: remove unused IedSize

Aaron Durbin (adurbin@chromium.org) gerrit at coreboot.org
Wed Aug 12 17:52:18 CEST 2015


Aaron Durbin (adurbin at chromium.org) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11200

-gerrit

commit 2bec24976e6a5139438fffaaeda265585a2c218f
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Aug 5 17:36:36 2015 -0500

    kunimitsu sklrvp: remove unused IedSize
    
    The skylake code is using IED_REGION_SIZE instead of
    devicetree.cb. Drop the the option from the device trees.
    
    BUG=chrome-os-partner:43636
    BRANCH=None
    TEST=None
    
    Original-Change-Id: Ib252266060fbc6ed0eeaac19a6b79c173c6c9a13
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/290932
    Original-Reviewed-by: Leroy P Leahy <leroy.p.leahy at intel.com>
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
    Original-Trybot-Ready: David James <davidjames at chromium.org>
    
    Change-Id: Ib08628e163ac27d4c49eddcbec6cab3252abd4aa
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
---
 src/mainboard/intel/kunimitsu/devicetree.cb | 1 -
 src/mainboard/intel/sklrvp/devicetree.cb    | 3 ---
 2 files changed, 4 deletions(-)

diff --git a/src/mainboard/intel/kunimitsu/devicetree.cb b/src/mainboard/intel/kunimitsu/devicetree.cb
index 9b0ca0f..7f1b35f 100644
--- a/src/mainboard/intel/kunimitsu/devicetree.cb
+++ b/src/mainboard/intel/kunimitsu/devicetree.cb
@@ -39,7 +39,6 @@ chip soc/intel/skylake
 	register "gpe0_en_4" = "0x00000000"
 
 	# Memory related
-	register "IedSize" = "0x0"
 	register "ProbelessTrace" = "0"
 
 	# Lan
diff --git a/src/mainboard/intel/sklrvp/devicetree.cb b/src/mainboard/intel/sklrvp/devicetree.cb
index 66c1f18..128c222 100644
--- a/src/mainboard/intel/sklrvp/devicetree.cb
+++ b/src/mainboard/intel/sklrvp/devicetree.cb
@@ -68,9 +68,6 @@ chip soc/intel/skylake
 	# Enable S0ix
 	register "s0ix_enable" = "0"
 
-	# Memory related
-	register "IedSize" = "0x0"
-
 	# Probeless Trace function
 	register "ProbelessTrace" = "0"
 



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