[coreboot-gerrit] Patch merged into coreboot/master: skylake: clear write-1-to-clear fields in power regs

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 6fd5bd20d389a85c360d473bd60e73441b71c306
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Tue Aug 4 21:04:02 2015 -0500

    skylake: clear write-1-to-clear fields in power regs
    
    Explicitly clear all write-1-to-clear fields in the
    appropriate power state registers. That way stale
    state isn't left around from boot to boot. The
    MMIO PMC registers are always added such that the
    resource can be accessed from reg_script. It doesn't
    hurt to add the resource, and it's actually more
    informative by attaching the actual resources
    owned by the device.
    
    BUG=chrome-os-partner:43625
    BRANCH=None
    TEST=Built and boot glados. Did global reset. Noticed bits
         set. Did normal reset and saw those same bits no longer set.
    
    Original-Change-Id: Idd412bd6bf2c6c57b46c74f9411bdf8413ddd83e
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/290339
    
    Change-Id: Ibef1aefedf6ba006f17f9f94998a10b39cc6bfec
    Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Reviewed-on: http://review.coreboot.org/11186
    Tested-by: build bot (Jenkins)
    Reviewed-by: Patrick Georgi <pgeorgi at google.com>


See http://review.coreboot.org/11186 for details.

-gerrit