[coreboot-gerrit] Patch merged into coreboot/master: skylake: Update Memory and Silicon Init params

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit 5c1c3d69dd47e11bea2e3f61eeb17ed13e5a8e0d
Author: Rizwan Qureshi <rizwan.qureshi at intel.com>
Date:   Tue Jul 21 20:21:50 2015 +0530

    skylake: Update Memory and Silicon Init params
    
    Update the MemoryInit and SilicoInit params as per
    FSP 1.3.0 release.
    
    Note: add SvGv and Rmt to Upd.
    
    BRANCH=None
    BUG=None
    TEST=Build and Boot FAB3 (Kunimitsu)
    CQ-DEPEND=CL:*226035, CL:*226045
    
    Original-Change-Id: I62000f6a485fee42ef733c3b548192f2bedfce49
    Original-Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Original-Signed-off-by: Robbie Zhang <robbie.zhang at intel.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/291573
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Tested-by: Wenkai Du <wenkai.du at intel.com>
    
    Change-Id: Iaafa658b4e710fe512526a521cf6c529efb19bf0
    Signed-off-by: Rizwan Qureshi <rizwan.qureshi at intel.com>
    Signed-off-by: Robbie Zhang <robbie.zhang at intel.com>
    Reviewed-on: http://review.coreboot.org/11238
    Tested-by: build bot (Jenkins)
    Reviewed-by: Stefan Reinauer <stefan.reinauer at coreboot.org>


See http://review.coreboot.org/11238 for details.

-gerrit