[coreboot-gerrit] Patch set updated for coreboot: rockchip: rk3288: fix phsync & pvsync bug

Patrick Georgi (pgeorgi@google.com) gerrit at coreboot.org
Thu Aug 27 17:28:52 CEST 2015


Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11380

-gerrit

commit dc4192ed4076d9c1ee83710eb812d87dfda6a48f
Author: Yakir Yang <ykk at rock-chips.com>
Date:   Tue Jul 21 22:47:55 2015 -0500

    rockchip: rk3288: fix phsync & pvsync bug
    
    Struct edid defien pvsync & phsync as an character,
    like '+' or '-', so we need to check sync polarity
    by comparing with characters '+' and '-' instead of
    treating as boolean.
    
    BRANCH=None
    BUG=chrome-os-partner:42946
    TEST=Mickey board, light monitor normally
    
    Change-Id: I92d233e19b6df8917fb8ff9a327ccb842c152d65
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
    Original-Commit-Id: 2d22d4b6e7108474f67200e0fb1e4894cd88db85
    Original-Change-Id: I14c72aa8994227092a1059d2b25c1dd2249b9db1
    Original-Signed-off-by: Yakir Yang <ykk at rock-chips.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/289963
    Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
    Original-Commit-Queue: David Hendricks <dhendrix at chromium.org>
    Original-Tested-by: David Hendricks <dhendrix at chromium.org>
---
 src/soc/rockchip/rk3288/hdmi.c | 4 ++--
 src/soc/rockchip/rk3288/vop.c  | 4 ++--
 2 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/src/soc/rockchip/rk3288/hdmi.c b/src/soc/rockchip/rk3288/hdmi.c
index c9cc232..582c834 100644
--- a/src/soc/rockchip/rk3288/hdmi.c
+++ b/src/soc/rockchip/rk3288/hdmi.c
@@ -494,11 +494,11 @@ static void hdmi_av_composer(const struct edid *edid)
 	/* set up hdmi_fc_invidconf */
 	inv_val = HDMI_FC_INVIDCONF_HDCP_KEEPOUT_INACTIVE;
 
-	inv_val |= (edid->pvsync ?
+	inv_val |= ((edid->pvsync == '+') ?
 		   HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_HIGH :
 		   HDMI_FC_INVIDCONF_VSYNC_IN_POLARITY_ACTIVE_LOW);
 
-	inv_val |= (edid->phsync ?
+	inv_val |= ((edid->phsync == '+') ?
 		   HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_HIGH :
 		   HDMI_FC_INVIDCONF_HSYNC_IN_POLARITY_ACTIVE_LOW);
 
diff --git a/src/soc/rockchip/rk3288/vop.c b/src/soc/rockchip/rk3288/vop.c
index 8c69321..30b73c2 100644
--- a/src/soc/rockchip/rk3288/vop.c
+++ b/src/soc/rockchip/rk3288/vop.c
@@ -125,8 +125,8 @@ void rkvop_mode_set(u32 vop_id, const struct edid *edid, u32 mode)
 	clrsetbits_le32(&preg->dsp_ctrl0,
 			M_DSP_OUT_MODE | M_DSP_VSYNC_POL | M_DSP_HSYNC_POL,
 			V_DSP_OUT_MODE(15) |
-			V_DSP_HSYNC_POL(!!edid->phsync) |
-			V_DSP_VSYNC_POL(!!edid->pvsync));
+			V_DSP_HSYNC_POL(edid->phsync == '+') |
+			V_DSP_VSYNC_POL(edid->pvsync == '+'));
 
 	write32(&preg->dsp_htotal_hs_end, V_HSYNC(hsync_len) |
 		V_HORPRD(hsync_len + hback_porch + hactive + hfront_porch));



More information about the coreboot-gerrit mailing list