[coreboot-gerrit] Patch set updated for coreboot: soc/intel/common: Add mrc.cache file to CBFS when appropriate

Alexandru Gagniuc (mr.nuke.me@gmail.com) gerrit at coreboot.org
Sat Aug 29 00:14:45 CEST 2015


Alexandru Gagniuc (mr.nuke.me at gmail.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11440

-gerrit

commit f4e50a13821594213ec2c4664d74c896e99527ea
Author: Alexandru Gagniuc <mr.nuke.me at gmail.com>
Date:   Fri Aug 28 14:28:35 2015 -0400

    soc/intel/common: Add mrc.cache file to CBFS when appropriate
    
    The code in mrc_cache.c doesn't check for the presence of 'mrc.cache',
    and just returns hardcoded value for he location of he MRC cache. This
    becomes a problem when there is a CBFS file at the same location,
    which can get overwritten. A CBFS file is created to cover this region
    so that nothing can be added there.
    This has the advantage of creating a build time error if another cbfs
    file is hardcoded over the same region.
    
    The default location of the MRC cache is also moved to 4G - 128K to
    ensure that it defaults to something within CBFS.
    
    Change-Id: Ic029c182f5a2180cb680e09b25165ee303a448a3
    Signed-off-by: Alexandru Gagniuc <mr.nuke.me at gmail.com>
---
 src/soc/intel/common/Kconfig      |  2 +-
 src/soc/intel/common/Makefile.inc | 13 +++++++++++++
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 954b38b..8e632bb 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -18,7 +18,7 @@ if CACHE_MRC_SETTINGS
 config MRC_SETTINGS_CACHE_BASE
 	hex
 	depends on !USE_FMAP
-	default 0xffb00000
+	default 0xfffe0000
 
 config MRC_SETTINGS_CACHE_SIZE
 	hex
diff --git a/src/soc/intel/common/Makefile.inc b/src/soc/intel/common/Makefile.inc
index 7c5bbbe..892ae95 100644
--- a/src/soc/intel/common/Makefile.inc
+++ b/src/soc/intel/common/Makefile.inc
@@ -17,4 +17,17 @@ ramstage-$(CONFIG_SOC_INTEL_COMMON_STAGE_CACHE) += stage_cache.c
 ramstage-$(CONFIG_PLATFORM_USES_FSP1_1) += util.c
 ramstage-$(CONFIG_GOP_SUPPORT) += vbt.c
 
+# Create and add the MRC cache to the cbfs image
+ifneq ($(CONFIG_CHROMEOS),y)
+$(obj)/mrc.cache: $(obj)/config.h
+	dd if=/dev/zero count=1 \
+	bs=$(shell printf "%d" $(CONFIG_MRC_SETTINGS_CACHE_SIZE) ) | \
+	tr '\000' '\377' > $@
+
+cbfs-files-$(CONFIG_CACHE_MRC_SETTINGS) += mrc.cache
+mrc.cache-file := $(obj)/mrc.cache
+mrc.cache-position := $(CONFIG_MRC_SETTINGS_CACHE_BASE)
+mrc.cache-type := mrc_cache
+endif
+
 endif



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