[coreboot-gerrit] Patch set updated for coreboot: intel/skylake: mask off txstate before setting new gpio value

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at http://review.coreboot.org/11416

-gerrit

commit 00ff7a06819224ac5014ed1e063dad03b80d552d
Author: Aaron Durbin <adurbin at chromium.org>
Date:   Wed Aug 19 21:07:14 2015 -0500

    intel/skylake: mask off txstate before setting new gpio value
    
    The previously driven TX state of the buffer was not
    being cleared before or'ing in the new value. Fix this
    oversight.
    
    BUG=chrome-os-partner:43522
    BRANCH=None
    TEST=Built and booted glados. Also dumped assembly and saw the
         masking happen.
    
    Change-Id: I74ea469564d37d6b29e9481b0ea704f04f54ac30
    Signed-off-by: Patrick Georgi <patrick at georgi-clan.de>
    Original-Commit-Id: d399e8b32b30b8b2275bb6ff8dd24f7d5cfeadda
    Original-Change-Id: I341b396af5de20ffeeb2e42066b224dd54251793
    Original-Signed-off-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-on: https://chromium-review.googlesource.com/294541
    Original-Reviewed-by: Duncan Laurie <dlaurie at chromium.org>
---
 src/soc/intel/skylake/gpio.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/soc/intel/skylake/gpio.c b/src/soc/intel/skylake/gpio.c
index 5493cbd..3610a6c 100644
--- a/src/soc/intel/skylake/gpio.c
+++ b/src/soc/intel/skylake/gpio.c
@@ -383,6 +383,7 @@ void gpio_set(gpio_t gpio_num, int value)
 		return;
 
 	reg = read32(&dw_regs[0]);
+	reg &= ~PAD_FIELD(GPIOTXSTATE, MASK);
 	reg |= PAD_FIELD_VAL(GPIOTXSTATE, value);
 	write32(&dw_regs[0], reg);
 	/* GPIO port ids support posted write semantics. */