[coreboot-gerrit] New patch to review for coreboot: google/chell: update dptf TSR1 & TSR2 critial points

[Patrick Georgi (pgeorgi@google.com)]

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12604

-gerrit

commit 0d1f21c77624604511bafe4979fbf703ec05fb90
Author: Wisley <wisley.chen at quantatw.com>
Date:   Tue Nov 24 20:12:36 2015 +0800

    google/chell: update dptf TSR1 & TSR2 critial points
    
    update dptf TSR1 & TSR2 critial points from 70 to 75
    TSR1 & TSR2 are reach 68 degree that is close to 70 degree afer SVPT
    test, change the point will avoid to trigger critial in our factory
    run in test
    
    BRANCH=none
    BUG=none
    TEST=build and boot chell DUT
    
    Change-Id: Ie5b8b24d82e929a7bd254967b70b61fda2c8bd0a
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
    Original-Commit-Id: cf29fee19edf425010cc76af95b7a8e73a3d82bb
    Original-Change-Id: Idb9dd77432cfd246c1c612e52c6f945352e265ca
    Original-Signed-off-by: Wisley Chen <Wisley.Chen at quantatw.com>
    Original-Reviewed-on: https://chromium-review.googlesource.com/313967
    Original-Commit-Ready: Duncan Laurie <dlaurie at chromium.org>
    Original-Tested-by: Chen Wisley <wisley.chen at quantatw.com>
    Original-Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Original-Reviewed-by: Chen Wisley <wisley.chen at quantatw.com>
---
 src/mainboard/google/chell/acpi/dptf.asl | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/src/mainboard/google/chell/acpi/dptf.asl b/src/mainboard/google/chell/acpi/dptf.asl
index 45783dc..c8362b7 100644
--- a/src/mainboard/google/chell/acpi/dptf.asl
+++ b/src/mainboard/google/chell/acpi/dptf.asl
@@ -25,12 +25,12 @@
 #define DPTF_TSR1_SENSOR_ID	2
 #define DPTF_TSR1_SENSOR_NAME	"Charger"
 #define DPTF_TSR1_PASSIVE	55
-#define DPTF_TSR1_CRITICAL	70
+#define DPTF_TSR1_CRITICAL	75
 
 #define DPTF_TSR2_SENSOR_ID	3
 #define DPTF_TSR2_SENSOR_NAME	"DRAM"
 #define DPTF_TSR2_PASSIVE	55
-#define DPTF_TSR2_CRITICAL	70
+#define DPTF_TSR2_CRITICAL	75
 
 #define DPTF_TSR3_SENSOR_ID	4
 #define DPTF_TSR3_SENSOR_NAME	"WiFi"