[coreboot-gerrit] New patch to review for coreboot: google/oak: Implement the code which reads GPIOs for ChromeOS.
Patrick Georgi (pgeorgi@google.com)
gerrit at coreboot.org
Tue Dec 1 19:57:55 CET 2015
Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12606
-gerrit
commit 83b6d82f4293da40d2ddaf4565e2479c26972915
Author: Yidi Lin <yidi.lin at mediatek.com>
Date: Fri Jul 31 17:10:57 2015 +0800
google/oak: Implement the code which reads GPIOs for ChromeOS.
BUG=none
BRANCH=none
TEST=emerge-oak corebootk
Change-Id: Ic1a0d640cac7fd98acd06d619736303fa449c0a1
Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
Original-Commit-Id: ce465e8cbdf6465c072e476a91a400d78c959218
Original-Change-Id: Iade51db02f45264fdffe387e0563b60e637c0710
Original-Signed-off-by: Yidi Lin <yidi.lin at mediatek.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/292674
Original-Reviewed-by: Julius Werner <jwerner at chromium.org>
---
src/mainboard/google/oak/bootblock.c | 4 ++
src/mainboard/google/oak/chromeos.c | 86 +++++++++++++++++++++++++++++++++++-
src/mainboard/google/oak/gpio.h | 40 +++++++++++++++++
3 files changed, 128 insertions(+), 2 deletions(-)
diff --git a/src/mainboard/google/oak/bootblock.c b/src/mainboard/google/oak/bootblock.c
index 38a777c..e82ad6e 100644
--- a/src/mainboard/google/oak/bootblock.c
+++ b/src/mainboard/google/oak/bootblock.c
@@ -24,6 +24,8 @@
#include <soc/pericfg.h>
#include <soc/pinmux.h>
+#include "gpio.h"
+
static void i2c_set_gpio_pinmux(void)
{
gpio_set_mode(PAD_SDA1, PAD_SDA1_FUNC_SDA1);
@@ -45,4 +47,6 @@ void bootblock_mainboard_init(void)
/* set i2c related gpio */
i2c_set_gpio_pinmux();
+
+ setup_chromeos_gpios();
}
diff --git a/src/mainboard/google/oak/chromeos.c b/src/mainboard/google/oak/chromeos.c
index 8d45a13..9f4cbaa 100644
--- a/src/mainboard/google/oak/chromeos.c
+++ b/src/mainboard/google/oak/chromeos.c
@@ -18,10 +18,88 @@
*/
#include <boot/coreboot_tables.h>
+#include <console/console.h>
+#include <ec/google/chromeec/ec.h>
+#include <ec/google/chromeec/ec_commands.h>
+#include <gpio.h>
+#include <string.h>
#include <vendorcode/google/chromeos/chromeos.h>
+#include "gpio.h"
+
+void setup_chromeos_gpios(void)
+{
+ gpio_input(WRITE_PROTECT);
+ gpio_input_pullup(EC_IN_RW);
+ gpio_input_pullup(EC_IRQ);
+ gpio_input_pullup(LID);
+ gpio_input_pullup(POWER_BUTTON);
+ gpio_output(EC_SUSPEND_L, 1);
+}
+
void fill_lb_gpios(struct lb_gpios *gpios)
{
+ int count = 0;
+
+ /* Write protect : active low */
+ gpios->gpios[count].port = WRITE_PROTECT;
+ gpios->gpios[count].polarity = ACTIVE_LOW;
+ gpios->gpios[count].value = gpio_get(WRITE_PROTECT);
+ strncpy((char *)gpios->gpios[count].name, "write protect",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Recovery: active high */
+ gpios->gpios[count].port = -1;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = get_recovery_mode_switch();
+ strncpy((char *)gpios->gpios[count].name, "recovery",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Lid: active high */
+ gpios->gpios[count].port = LID;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = -1;
+ strncpy((char *)gpios->gpios[count].name, "lid", GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Power: active high */
+ gpios->gpios[count].port = POWER_BUTTON;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = -1;
+ strncpy((char *)gpios->gpios[count].name, "power",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* Developer: virtual GPIO active high */
+ gpios->gpios[count].port = -1;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = get_developer_mode_switch();
+ strncpy((char *)gpios->gpios[count].name, "developer",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* EC in RW: active high */
+ gpios->gpios[count].port = EC_IN_RW;
+ gpios->gpios[count].polarity = ACTIVE_HIGH;
+ gpios->gpios[count].value = -1;
+ strncpy((char *)gpios->gpios[count].name, "EC in RW",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ /* EC interrupt: GPIO active low */
+ gpios->gpios[count].port = EC_IRQ;
+ gpios->gpios[count].polarity = ACTIVE_LOW;
+ gpios->gpios[count].value = -1;
+ strncpy((char *)gpios->gpios[count].name, "EC interrupt",
+ GPIO_MAX_NAME_LENGTH);
+ count++;
+
+ gpios->size = sizeof(*gpios) + (count * sizeof(struct lb_gpio));
+ gpios->count = count;
+
+ printk(BIOS_ERR, "Added %d GPIOS size %d\n", count, gpios->size);
}
int get_developer_mode_switch(void)
@@ -31,10 +109,14 @@ int get_developer_mode_switch(void)
int get_recovery_mode_switch(void)
{
- return 0;
+ uint32_t ec_events;
+
+ ec_events = google_chromeec_get_events_b();
+ return !!(ec_events &
+ EC_HOST_EVENT_MASK(EC_HOST_EVENT_KEYBOARD_RECOVERY));
}
int get_write_protect_state(void)
{
- return 0;
+ return !gpio_get(WRITE_PROTECT);
}
diff --git a/src/mainboard/google/oak/gpio.h b/src/mainboard/google/oak/gpio.h
new file mode 100644
index 0000000..d319749
--- /dev/null
+++ b/src/mainboard/google/oak/gpio.h
@@ -0,0 +1,40 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2015 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+ */
+
+#ifndef __MAINBOARD_GOOGLE_OAK_GPIO_H__
+#define __MAINBOARD_GOOGLE_OAK_GPIO_H__
+#include <soc/pinmux.h>
+
+enum {
+ LID = PAD_EINT12,
+ /* Write Protect */
+ WRITE_PROTECT = PAD_EINT4,
+ /* Power button */
+ POWER_BUTTON = PAD_EINT14,
+ /* EC Interrupt */
+ EC_IRQ = PAD_EINT0,
+ /* EC in RW signal */
+ EC_IN_RW = PAD_DAIPCMIN,
+ /* EC AP suspend */
+ EC_SUSPEND_L = PAD_KPROW1,
+};
+
+void setup_chromeos_gpios(void);
+
+#endif /* __MAINBOARD_GOOGLE_OAK_GPIO_H__ */
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