[coreboot-gerrit] Patch set updated for coreboot: Switch to fmap based firmware layout

Sat Dec 5 16:13:41 CET 2015

Patrick Georgi (pgeorgi at google.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/11692

-gerrit

commit 252f323262012020935e55fe015c23eec81384fe
Author: Patrick Georgi <pgeorgi at chromium.org>
Date:   Wed Sep 16 18:10:52 2015 +0200

    Switch to fmap based firmware layout
    
    We still add a master header for compatibility purposes, and the default
    layouts don't cover anything non-coreboot (eg. IFD regions) yet.
    
    The default layouts can be overridden by specifying an fmd file, from
    which the fmap is generated.
    
    Future work:
    - map IFD regions to fmap regions
    - non-x86: build minimalistic trampolines that jump into the first cbfs
      file, so the bootblock can be part of CBFS instead of reserving a
      whole 64K for it.
    - teach coreboot's cbfs code to work without the master header
    - teach coreboot's cbfs code to work on different fmap regions
    
    Change-Id: Id1085dcd5107cf0e02e8dc1e77dc0dd9497a819c
    Signed-off-by: Patrick Georgi <pgeorgi at chromium.org>
---
 Makefile.inc                  | 90 +++++++++++++++++++++++++++++++++++++++++--
 util/cbfstool/default-x86.fmd | 15 ++++++++
 util/cbfstool/default.fmd     | 18 +++++++++
 3 files changed, 119 insertions(+), 4 deletions(-)

diff --git a/Makefile.inc b/Makefile.inc
index 6a553fb..217e779 100644
--- a/Makefile.inc
+++ b/Makefile.inc
@@ -619,10 +619,92 @@ prebuild-files = \
 	       $(cbfs-add-cmd) $(if $(call extract_nth,5,$(file)),-b $(call extract_nth,5,$(file))) &&))
 prebuilt-files = $(foreach file,$(cbfs-files), $(call extract_nth,1,$(file)))
 
-$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(FMAPTOOL) $(CBFSTOOL) $$(cpu_ucode_cbfs_file)
-	$(CBFSTOOL) $@.tmp create \
-	-B $(objcbfs)/bootblock.bin \
-	$(CBFSTOOL_PRE1_OPTS)
+ifeq ($(CONFIG_FMDFILE),)
+# For a description of the flash layout described by these variables, check
+# the $(DEFAULT_FLASHMAP) .fmd files.
+ifeq ($(CONFIG_ARCH_X86),y)
+DEFAULT_FLASHMAP:=$(top)/util/cbfstool/default-x86.fmd
+# entire flash
+FMAP_ROM_ADDR := $(call int-subtract, 0x100000000 $(CONFIG_ROM_SIZE))
+FMAP_ROM_SIZE := $(CONFIG_ROM_SIZE)
+# entire "BIOS" region (everything directly of concern to the host system)
+# relative to ROM_BASE
+FMAP_BIOS_BASE := $(call int-subtract, $(CONFIG_ROM_SIZE) $(CONFIG_CBFS_SIZE))
+FMAP_BIOS_SIZE := $(CONFIG_CBFS_SIZE)
+# position and size of flashmap, relative to BIOS_BASE
+FMAP_FMAP_BASE := 0
+FMAP_FMAP_SIZE := 0x100
+# position and size of CBFS, relative to BIOS_BASE
+FMAP_CBFS_BASE := $(FMAP_FMAP_SIZE)
+FMAP_CBFS_SIZE := $(call int-subtract, $(FMAP_BIOS_SIZE) $(FMAP_FMAP_SIZE))
+else
+DEFAULT_FLASHMAP:=$(top)/util/cbfstool/default.fmd
+# entire flash
+FMAP_ROM_ADDR := 0
+FMAP_ROM_SIZE := $(CONFIG_ROM_SIZE)
+# entire "BIOS" region (everything directly of concern to the host system)
+# relative to ROM_BASE
+FMAP_BIOS_BASE := 0
+FMAP_BIOS_SIZE := $(CONFIG_CBFS_SIZE)
+# position and size of flashmap, relative to BIOS_BASE
+FMAP_FMAP_BASE := 0x20000
+FMAP_FMAP_SIZE := 0x100
+# position and size of CBFS, relative to BIOS_BASE
+FMAP_CBFS_BASE := $(call int-add,$(FMAP_FMAP_BASE) $(FMAP_FMAP_SIZE))
+FMAP_CBFS_SIZE := $(call int-subtract,$(FMAP_BIOS_SIZE) $(FMAP_CBFS_BASE))
+endif
+
+$(obj)/fmap.fmd: $(top)/Makefile.inc $(DEFAULT_FLASHMAP)
+	sed -e "s,##ROM_BASE##,$(FMAP_ROM_ADDR)," \
+	    -e "s,##ROM_SIZE##,$(FMAP_ROM_SIZE)," \
+	    -e "s,##BIOS_BASE##,$(FMAP_BIOS_BASE)," \
+	    -e "s,##BIOS_SIZE##,$(FMAP_BIOS_SIZE)," \
+	    -e "s,##FMAP_BASE##,$(FMAP_FMAP_BASE)," \
+	    -e "s,##FMAP_SIZE##,$(FMAP_FMAP_SIZE)," \
+	    -e "s,##CBFS_BASE##,$(FMAP_CBFS_BASE)," \
+	    -e "s,##CBFS_SIZE##,$(FMAP_CBFS_SIZE)," \
+		$(DEFAULT_FLASHMAP) > $@.tmp
+	mv $@.tmp $@
+else
+$(obj)/fmap.fmd: $(CONFIG_FMDFILE)
+	cp $< $@
+endif
+
+# generated at the same time as fmap.fmap
+$(obj)/fmap.h: $(obj)/fmap.fmap
+
+$(obj)/fmap.fmap: $(obj)/fmap.fmd $(FMAPTOOL)
+	$(FMAPTOOL) -h $(obj)/fmap.h $< $@
+
+$(obj)/coreboot.pre: $(objcbfs)/bootblock.bin $$(prebuilt-files) $(CBFSTOOL) $$(cpu_ucode_cbfs_file) $(obj)/fmap.fmap
+	$(CBFSTOOL) $@.tmp create -M $(obj)/fmap.fmap
+ifeq ($(CONFIG_ARCH_X86),y)
+	$(CBFSTOOL) $@.tmp add \
+		-f $(objcbfs)/bootblock.bin \
+		-n bootblock \
+		-t bootblock \
+		-b -$(call file-size,$(objcbfs)/bootblock.bin)
+else
+	# don't add bootblock to cbfs yet, it's just a waste of space
+	true $(CBFSTOOL) $@.tmp add \
+		-f $(objcbfs)/bootblock.bin \
+		-n bootblock \
+		-t bootblock \
+		-b 0
+	$(CBFSTOOL) $@.tmp write -u \
+		-r BOOTBLOCK \
+		-f $(objcbfs)/bootblock.bin
+	# make space for the CBFS master header pointer. "ptr_" is just
+	# arbitrary 4 bytes that will be overwritten by add-master-header.
+	printf "ptr_" > $@.tmp.2
+	$(CBFSTOOL) $@.tmp add \
+		-f $@.tmp.2 \
+		-n "header pointer" \
+		-t "cbfs header" \
+		-b -4
+	rm -f $@.tmp.2
+endif
+	$(CBFSTOOL) $@.tmp add-master-header
 	$(prebuild-files) true
 	mv $@.tmp $@
 else
diff --git a/util/cbfstool/default-x86.fmd b/util/cbfstool/default-x86.fmd
new file mode 100644
index 0000000..f344ab2
--- /dev/null
+++ b/util/cbfstool/default-x86.fmd
@@ -0,0 +1,15 @@
+# layout for firmware residing at top of 4GB address space
+# +-------------+ <-- 4GB - ROM_SIZE / start of flash
+# | unspecified |
+# +-------------+ <-- 4GB - BIOS_SIZE
+# | FMAP        |
+# +-------------+ <-- 4GB - BIOS_SIZE + FMAP_SIZE
+# | CBFS        |
+# +-------------+ <-- 4GB / end of flash
+
+FLASH@##ROM_BASE## ##ROM_SIZE## {
+	BIOS@##BIOS_BASE## ##BIOS_SIZE## {
+		FMAP@##FMAP_BASE## ##FMAP_SIZE##
+		COREBOOT(CBFS)@##CBFS_BASE## ##CBFS_SIZE##
+	}
+}
diff --git a/util/cbfstool/default.fmd b/util/cbfstool/default.fmd
new file mode 100644
index 0000000..32ddfa4
--- /dev/null
+++ b/util/cbfstool/default.fmd
@@ -0,0 +1,18 @@
+# layout for firmware when flash address space matches used address layout
+# +-------------+ <-- 0
+# | unspecified |
+# +-------------+ <-- BIOS_BASE
+# | bootblock   |
+# +-------------+ <-- BIOS_BASE + 128K
+# | FMAP        |
+# +-------------+ <-- BIOS_BASE + 128K + FMAP_SIZE
+# | CBFS        |
+# +-------------+ <-- ROM_SIZE
+
+FLASH@##ROM_BASE## ##ROM_SIZE## {
+	BIOS@##BIOS_BASE## ##BIOS_SIZE## {
+		BOOTBLOCK 128K
+		FMAP@##FMAP_BASE## ##FMAP_SIZE##
+		COREBOOT(CBFS)@##CBFS_BASE## ##CBFS_SIZE##
+	}
+}

