[coreboot-gerrit] New patch to review for coreboot: Cyan :Enable DPTF charger/TSR1/TSR2 participant

[Hannah Williams (hannah.williams@intel.com)]

Hannah Williams (hannah.williams at intel.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12748

-gerrit

commit 8de0276279c8959baee037787ddcce9d1232f4e0
Author: Freddy Paul <freddy.paul at intel.com>
Date:   Fri Oct 2 19:06:57 2015 -0700

    Cyan :Enable DPTF charger/TSR1/TSR2 participant
    
    With DPTF running we need to enable charger participant.
    
    DPTF keeps polling PPPC every 3 sec and as long as it see the
    proper value when it reads PPPC it will enable charging as long
    as temperature is not too high.
    
    Requesting to charge the battery on every AC connect query(_Q04)
    without knowing if battery expect charging is not good, hence we
    need to remove that too.
    
    TEST=Plug/Unplug AC Adapter multiple times and make sure device is
         charging  properly.
    
    Reviewed-on: https://chromium-review.googlesource.com/303990
    Reviewed-by: Jenny Tc <jenny.tc at intel.com>
    Reviewed-by: T.H. Lin <T.H_Lin at quantatw.com>
    Tested-by: T.H. Lin <T.H_Lin at quantatw.com>
    Tested-by: Jagadish Krishnamoorthy <jagadish.krishnamoorthy at intel.com>
    Reviewed-by: Divya Jyothi <divya.jyothi at intel.com>
    Reviewed-by: Aaron Durbin <adurbin at chromium.org>
    Change-Id: I188e80e6688d0bac5bed6dd64cd2d0feefa30d3f
    Signed-off-by: Freddy Paul <freddy.paul at intel.com>
---
 src/ec/google/chromeec/acpi/ec.asl      |  6 ++++++
 src/mainboard/google/cyan/acpi/dptf.asl | 11 +++++++++++
 2 files changed, 17 insertions(+)

diff --git a/src/ec/google/chromeec/acpi/ec.asl b/src/ec/google/chromeec/acpi/ec.asl
index bcb26bf..44a7eed 100644
--- a/src/ec/google/chromeec/acpi/ec.asl
+++ b/src/ec/google/chromeec/acpi/ec.asl
@@ -22,7 +22,9 @@
 // Mainboard specific throttle handler
 External (\_TZ.THRT, MethodObj)
 External (\_SB.DPTF.TEVT, MethodObj)
+#ifdef DPTF_ENABLE_CHARGER
 External (\_SB.DPTF.TCHG, DeviceObj)
+#endif
 
 Device (EC0)
 {
@@ -170,9 +172,11 @@ Device (EC0)
 		Store ("EC: AC CONNECTED", Debug)
 		Store (ACEX, \PWRS)
 		Notify (AC, 0x80)
+#ifdef DPTF_ENABLE_CHARGER
 		If (CondRefOf (\_SB.DPTF.TCHG)) {
 			Notify (\_SB.DPTF.TCHG, 0x80)
 		}
+#endif
 		\PNOT ()
 	}
 
@@ -182,9 +186,11 @@ Device (EC0)
 		Store ("EC: AC DISCONNECTED", Debug)
 		Store (ACEX, \PWRS)
 		Notify (AC, 0x80)
+#ifdef DPTF_ENABLE_CHARGER
 		If (CondRefOf (\_SB.DPTF.TCHG)) {
 			Notify (\_SB.DPTF.TCHG, 0x80)
 		}
+#endif
 		\PNOT ()
 	}
 
diff --git a/src/mainboard/google/cyan/acpi/dptf.asl b/src/mainboard/google/cyan/acpi/dptf.asl
index 95b6951..5da2fce 100755
--- a/src/mainboard/google/cyan/acpi/dptf.asl
+++ b/src/mainboard/google/cyan/acpi/dptf.asl
@@ -49,6 +49,17 @@ Name (DTRT, Package () {
 
 	/* CPU Effect on Temp Sensor 0 */
 	Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR0, 100, 100, 0, 0, 0, 0 },
+
+#ifdef DPTF_ENABLE_CHARGER
+	/* Charger Effect on Temp Sensor 1 */
+	Package () { \_SB.DPTF.TCHG, \_SB.DPTF.TSR1, 200, 600, 0, 0, 0, 0 },
+#endif
+
+	/* CPU Effect on Temp Sensor 1 */
+	Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR1, 100, 600, 0, 0, 0, 0 },
+
+	/* CPU Effect on Temp Sensor 2 */
+	Package () { \_SB.PCI0.B0DB, \_SB.DPTF.TSR2, 100, 600, 0, 0, 0, 0 },
 })
 
 Name (MPPC, Package ()