[coreboot-gerrit] Patch merged into coreboot/master: soc/intel/fsp_baytrail: Adjust root port INT routing

[gerrit at coreboot.org]

the following patch was just integrated into master:
commit ffcd9393a41e20883c219a2f47a1510aef82dcd4
Author: Martin Roth <martinroth at google.com>
Date:   Mon Dec 7 16:50:47 2015 -0700

    soc/intel/fsp_baytrail: Adjust root port INT routing
    
    Adjust the root port INT routing based on Bay Trail spec:
    Document Number: 538136, Rev. 3.9
    
    Table 241. Interrupt Generated for INT[A-D] Interrupts
                 INTA  INTB  INTC  INTD
    Root Port 1 INTA# INTB# INTC# INTD#
    Root Port 2 INTD# INTA# INTB# INTC#
    Root Port 3 INTC# INTD# INTA# INTB#
    Root Port 4 INTB# INTC# INTD# INTA#
    
    Change-Id: I22a8c0bc6ad731dfb79385d6e165f1ec0a07507d
    Signed-off-by: Martin Roth <martinroth at google.com>
    Reviewed-on: https://review.coreboot.org/12684
    Tested-by: build bot (Jenkins)
    Reviewed-by: Werner Zeh <werner.zeh at siemens.com>
    Reviewed-by: Ben Gardner <gardner.ben at gmail.com>


See https://review.coreboot.org/12684 for details.

-gerrit