[coreboot-gerrit] New patch to review for coreboot: imgtec/pistachio: sys_pll_setup receives refdiv and feedback

Ionela Voinescu (ionela.voinescu@imgtec.com) gerrit at coreboot.org
Thu Dec 17 21:08:13 CET 2015


Ionela Voinescu (ionela.voinescu at imgtec.com) just uploaded a new patch set to gerrit, which you can find at https://review.coreboot.org/12765

-gerrit

commit 0838f58d37c695abb42007ab2782abe2f2de79c1
Author: Ionela Voinescu <ionela.voinescu at imgtec.com>
Date:   Wed Jul 15 12:10:05 2015 +0100

    imgtec/pistachio: sys_pll_setup receives refdiv and feedback
    
    Change the interface that sets up the system PLL to support
    a given reference devider value and given feedback value.
    
    Change-Id: I98cf7c655dbb3e95b8fcee3c7f468122021c70b5
    Signed-off-by: Ionela Voinescu <ionela.voinescu at imgtec.com>
---
 src/soc/imgtec/pistachio/clocks.c             | 25 +++++++++++++++++--------
 src/soc/imgtec/pistachio/include/soc/clocks.h |  2 +-
 2 files changed, 18 insertions(+), 9 deletions(-)

diff --git a/src/soc/imgtec/pistachio/clocks.c b/src/soc/imgtec/pistachio/clocks.c
index 40c45b0..43bdc55 100644
--- a/src/soc/imgtec/pistachio/clocks.c
+++ b/src/soc/imgtec/pistachio/clocks.c
@@ -44,6 +44,13 @@
 #define SYS_PLL_STATUS_ADDR		0xB8144038
 #define SYS_PLL_STATUS_LOCK_MASK	0x00000001
 
+#define SYS_PLL_REFDIV_ADDR		0xB814403C
+#define SYS_PLL_REFDIV_MASK		0x0000003F
+#define SYS_PLL_REFDIV_SHIFT		0
+#define SYS_PLL_FEEDBACK_ADDR		0xB814403C
+#define SYS_PLL_FEEDBACK_MASK		0x0003FFC0
+#define SYS_PLL_FEEDBACK_SHIFT		6
+
 #define MIPS_PLL_POSTDIV_ADDR		0xB8144004
 #define MIPS_PLL_POSTDIV1_MASK		0x001C0000
 #define MIPS_PLL_POSTDIV1_SHIFT		18
@@ -156,13 +163,13 @@ static struct pll_parameters pll_params[] = {
 		.status_addr = SYS_PLL_STATUS_ADDR,
 		.status_lock_mask = SYS_PLL_STATUS_LOCK_MASK,
 		.refdivider = 0, /* Not defined yet */
-		.refdiv_addr = 0, /* Not necessary */
-		.refdiv_shift = 0, /* Not necessary */
-		.refdiv_mask = 0, /* Not necessary */
-		.feedback = 0, /* Not necessary */
-		.feedback_addr = 0, /* Not necessary */
-		.feedback_shift = 0, /* Not necessary */
-		.feedback_mask = 0, /* Not necessary */
+		.refdiv_addr = SYS_PLL_REFDIV_ADDR,
+		.refdiv_shift = SYS_PLL_REFDIV_SHIFT,
+		.refdiv_mask = SYS_PLL_REFDIV_MASK,
+		.feedback = 0, /* Not defined yet */
+		.feedback_addr = SYS_PLL_FEEDBACK_ADDR,
+		.feedback_shift = SYS_PLL_FEEDBACK_SHIFT,
+		.feedback_mask = SYS_PLL_FEEDBACK_MASK
 	},
 
 	[MIPS_PLL] = {
@@ -263,8 +270,10 @@ static int pll_setup(struct pll_parameters *param, u8 divider1, u8 divider2)
 	return CLOCKS_OK;
 }
 
-int sys_pll_setup(u8 divider1, u8 divider2)
+int sys_pll_setup(u8 divider1, u8 divider2, u8 refdivider, u32 feedback)
 {
+	pll_params[SYS_PLL].refdivider = refdivider;
+	pll_params[SYS_PLL].feedback = feedback;
 	return pll_setup(&(pll_params[SYS_PLL]), divider1, divider2);
 }
 
diff --git a/src/soc/imgtec/pistachio/include/soc/clocks.h b/src/soc/imgtec/pistachio/include/soc/clocks.h
index f351a6f..fc07f0a 100644
--- a/src/soc/imgtec/pistachio/include/soc/clocks.h
+++ b/src/soc/imgtec/pistachio/include/soc/clocks.h
@@ -21,7 +21,7 @@
 #include <stdint.h>
 
 /* Functions for PLL setting */
-int sys_pll_setup(u8 divider1, u8 divider2);
+int sys_pll_setup(u8 divider1, u8 divider2, u8 predivider, u32 feedback);
 int mips_pll_setup(u8 divider1, u8 divider2, u8 predivider, u32 feedback);
 
 /* Peripheral divider setting */



More information about the coreboot-gerrit mailing list